STM32F101XF Datasheet, PDF (58/117 Pages) STMicroelectronics – Single-cycle multiplication and hardware division

Electrical characteristics
STM32F101xF, STM32F101xG
Figure 19. Asynchronous non-multiplexed SRAM/PSRAM/NOR read waveforms
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1. Mode 2/B, C and D only. In Mode 1, FSMC_NADV is not used.
FSMC_BusTurnAroundDuration = 0.
069
Table 31. Asynchronous non-multiplexed SRAM/PSRAM/NOR read timings^{(1) (2)}
Symbol
Parameter
Min
Max
Unit
t_w(NE) FSMC_NE low time
5t_HCLK + 0.5 5t_HCLK + 2
ns
t_{v(NOE_NE)} FSMC_NEx low to FSMC_NOE low
0.5
1.5
ns
t_w(NOE) FSMC_NOE low time
5t_HCLK – 1
5t_HCLK + 1
ns
t_{h(NE_NOE)} FSMC_NOE high to FSMC_NE high hold time
0
-
ns
t_{v(A_NE)} FSMC_NEx low to FSMC_A valid
-
3
ns
t_{h(A_NOE)} Address hold time after FSMC_NOE high
0
-
ns
t_{v(BL_NE)} FSMC_NEx low to FSMC_BL valid
-
0
ns
t_{h(BL_NOE)} FSMC_BL hold time after FSMC_NOE high
0.5
-
ns
t_{su(Data_NE)} Data to FSMC_NEx high setup time
2t_HCLK - 1
-
ns
t_{su(Data_NOE)} Data to FSMC_NOEx high setup time
2t_HCLK - 1
-
ns
t_{h(Data_NOE)} Data hold time after FSMC_NOE high
0
-
ns
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