STM32F101X4 Datasheet, PDF (57/73 Pages) STMicroelectronics – Low-density access line, ARM-based 32-bit MCU with 16 or 32 KB Flash, 5 timers, ADC and 4 communication interfaces

STM32F101x4, STM32F101x6
Electrical characteristics
SPI interface characteristics
Unless otherwise specified, the parameters given in Table 40 are derived from tests
performed under the ambient temperature, f_PCLKx frequency and V_DD supply voltage
conditions summarized in Table 8.
Refer to Section 5.3.12: I/O port characteristics for more details on the input/output alternate
function characteristics (NSS, SCK, MOSI, MISO).
Table 40. SPI characteristics⁽¹⁾
Symbol
Parameter
Conditions
Min
Max Unit
f_SCK
1/t_c(SCK)
SPI clock frequency
Master mode
Slave mode
t_r(SCK)
t_f(SCK)
t_su(NSS)(2)
t_h(NSS)(2)
t_w(SCKH)(2)
t_w(SCKL)(2)
t_su(MI) ⁽²⁾
SPI clock rise and fall
time
NSS setup time
NSS hold time
SCK high and low time
Data input setup time
Master mode
Capacitive load: C = 30 pF
Slave mode
Slave mode
Master mode, f_PCLK = 36 MHz,
presc = 4
SPI
t_su(SI)(2)
Data input setup time
Slave mode
t_h(MI) ⁽²⁾
Data input hold time
Master mode
SPI
t_h(SI)(2)
Data input hold time
Slave mode
t_a(SO)(2)(3)
t_{dis(SO)(2)(4)}
t_v(SO) ⁽²⁾⁽¹⁾
Data output access time
Data output disable time
Data output valid time
Slave mode, f_PCLK = 36 MHz,
presc = 4
Slave mode, f_PCLK = 24 MHz
Slave mode
Slave mode (after enable edge)
t_v(MO)(2)(1) Data output valid time
Master mode (after enable
edge)
t_h(SO)(2)
t_h(MO)(2)
Data output hold time
Slave mode (after enable edge)
Master mode (after enable
edge)
0
0
4 t_PCLK
73
50
1
1
1
3
0
0
10
25
4
18
MHz
18
8
60
55
ns
4 t_PCLK
25
3
1. Remapped SPI characteristics to be determined.
2. Based on characterization, not tested in production.
3. Min time is for the minimum time to drive the output and the max time is for the maximum time to validate
the data.
4. Min time is for the minimum time to invalidate the output and the max time is for the maximum time to put
the data in Hi-Z
Doc ID 15058 Rev 3
57/74