S2-LP Datasheet, PDF (53/90 Pages) STMicroelectronics – Excellent receiver selectivity and blocking

S2-LP
7.2
STack packet
Preamble Sync
0:2046
0:32
bits
bits
Length
0:2
bytes
Dest.
address
1 bytes
Packet handler engine
Table 50: STack packet
Src
address
Seq
num
NO_ACK Payload
1 bytes
12
bits
1 bit
0:65535
bytes
CRC Postamble
0:4
bytes
0:510 bits
 Preamble: each preamble is a pair of ‘01’ or ‘10’ from 0 pair to 2046 pairs,
programmed by the register PREAMBLE_LENGTH. The binary sequences transmitted
in the various modulation modes are summarized in Table 49: "Preamble field
selection" (leftmost bit is transmitted first).
 Sync: the pattern that identify the start of the frame can be configured in value with a
programmable length from 0 to 32 bits, in steps of 1-bit length. The setting is done by
the register SYNC_LENGTH. The S2LP supports dual synchronization with a either a
primary or a secondary synchronization word. The binary content of the primary SYNC
word is programmable through registers SYNCx (x= 1, 2, 3, 4). The binary content of
the secondary SYNC word is programmable through registers SEC_SYNCx (x= 1, 2,
3, 4), note that such registers are in alternate use with address filtering registers. On
the transmitter side either the primary or the secondary word is transmitted according
to the value of the SECONDARY_SYNC_SEL register, in particular if
SECONDARY_SYNC_SEL = 0 then the primary synchronization word is transmitted;
if SECONDARY_SYNC_SEL = 1 then the secondary synchronization word is
transmitted. On the receiver side, the primary synchronization word is always enabled.
The search for the secondary synchronization word can be enabled setting
SECONDARY_SYNC_SEL = 1b. In this case, both the binary patterns are searched
for and both of them can trigger the start of payload demodulation. The SQI[5:0] value
reported in the LINK_QUALIF register is the maximum between the SQI of the primary
and secondary words. The bit SQI[6] indicates which synchronization word has been
detected: in particular, if the secondary synchronization word has been detected then
the SQI[6] = 1 otherwise if the primary synchronization word has been detected then
SQI[6] = 0. The binary pattern programmed in SYNCx (or SEC_SYNCx) is transmitted
on air starting with the most significant bit of x = 1, to the least significant bit of x = 4
according to the programmed synchronization word length.
 Length: The device supports both fixed and variable packet length transmission from
0 to 65535 bytes. On the transmitting device, the packet length is always set by using
the two registers PCKTLENx (x= 1, 2) as: PCKTLEN1 × 256 + PCKTLEN0. On the
receiving device, if FIX_VAR_LEN register is set to ‘1’, the packet length is directly
extracted from the field Length of the received packet itself. If the register
FIX_VAR_LEN = 0b the Length field of the received packet is not used, because is
already known from the registers PCKTLENx (x= 1, 2) as for the transmitter.
Furthermore, when variable packet length is used (FIX_VAR_LEN=1b), the width of
the binary field transmitted, must be configured through the LEN_WID register in the
following way:
 If the packet length is from 0 to 255 bytes (payload + address field), then
LEN_WID = 0 (1 byte length field transmitted).
 If the packet length is from 0 to 65535 bytes (payload + address field), then
LEN_WID = 1 (2 bytes length field transmitted).
 Destination address: the receiver uses this field to perform automatic filtering on its
value. It is a mandatory field always on. The destination address field is read from the
register RX_SOURCE_ADDR (TX only).
 Source address: the receiver uses this field to perform automatic filtering on its value.
It is a mandatory field always on. The source address field is read from the register
TX_SOURCE_ADDR (TX only).
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