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VND670SP Datasheet, PDF (5/14 Pages) STMicroelectronics – DUAL HIGH SIDE SWITCH WITH DUAL POWER MOS GATE DRIVER BRIDGE CONFIGURATION
VND670SP
WAVEFORMS AND TRUTH TABLE
TRUTH TABLE IN NORMAL OPERATING CONDITIONS
In normal operating conditions the DIAGX/ENX pin is considered as an input pin by the device. This pin must be externally
pulled high.
INA
INB
DIAGA/ENA DIAGB/ENB OUTA
OUTB GATEA GATEB
Comment
1
1
1
1
0
1
1
H
H
L
L
Brake to VCC
1
H
L
L
H
Clockwise
0
1
1
1
L
H
H
L
Counter cw
0
0
1
1
L
L
H
H
Brake to GND
X
X
0
0
L
L
L
L
Stand by
1
X
1
0
X
1
X
1
0
X
0
0
0
H
L
L
L
HSA only
0
L
L
H
L
MOSA only
1
L
H
L
L
HSB only
1
L
L
L
H
MOSB only
PWM pin usage:
In all cases, a “0” on the PWM pin will turn-off both GATEA and GATEB outputs. When PWM rises back to “1”, GATEA or
GATEB turn on again depending on the input pin state.
TYPICAL APPLICATION CIRCUIT FOR DC TO 10KHz PWM OPERATION
+5V
+5V
R1
Rprot
1K
DIAGA/ENA
Rprot
1K
PWM
Rprot
1K
INA
GATEA
VCC
VND670SP
OUTA
GND
Rgnd(*)
OUTB
UP
R1
Rprot
1K
DIAGB/ENB
GATEB
INB
Rprot
1K
M
DOWN
External Power Mos A
External Power Mos B
(*) Reverse battery protection:
- series relay in VCC line: Rgnd=0 Ohms
- series fuse in VCC line with antiparallel diode between ground and VCC: Rgnd=10 Ohms.
Layout hints:
The connection between GND pin of the VN670SP and the Power MOSFET SOURCE connections should be kept short enough to ensure
that the dynamic difference between these two points never exceed 1V for the bridge to operate properly.
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