TDA7265SA Datasheet, PDF (5/12 Pages) STMicroelectronics – 18W+18W STEREO AMPLIFIER WITH MUTE & ST-BY

TDA7265SA
Figure 6. Test and Application Circuit (Stereo Configuration)
+V_S
R2
R1
Q1
SW1
ST-BY ^DZ
C3
MUTE/
ST-BY ₅
IN (L) 7
C1
R4
R3
SW2
MUTE
GND 9
C2
IN (R) 11
D94AU087B
C4
C5
+V_S
3
+
4 OUT (L)
-
R5
R7
8 IN- (L)
C8
R6
10 IN- (R)
R9
R8
-
2 OUT (R)
+
R10
1
6
-V_S
C9
C7
C6
RL (L)
RL (R)
4 APPLICATION SUGGESTIONS (DEMO BOARD SCHEMATIC)
The recommended values of the external components are those shown the demoboard schematic different val-
ues can be used, the following table can help the designer
Table 5. .
COMPONENT
SUGGESTION
VALUE
PURPOSE
LARGER THAN
SMALLER THAN
RECOMMENDED VALUE RECOMMENDED VALUE
R1
10KΩ
Mute Circuit
Increase of Dz Biasing
Current
R2
15KΩ
Mute Circuit
V_pin #5 Shifted Downward V_pin #5 Shifted Upward
R3
18KΩ
Mute Circuit
V_pin #5 Shifted Upward
V_pin #5 Shifted Downward
R4
15KΩ
Mute Circuit
V_pin #5 Shifted Upward
V_pin #5 Shifted Downward
R5, R8
R6, R9
18KΩ
560Ω
Closed Loop Gain
Setting (*)
Increase of Gain
Decrease of Gain
R7, R10
4.7Ω
Frequency Stability
Danger of Oscillations
Danger of Oscillations
C1, C2
1µF
Input DC Decoupling
Higher Low Frequency Cutoff
C3
1µF
St-By/Mute Time
Larger On/Off Time
Smaller On/Off Time
Constant
C4, C6
1000µF Supply Voltage Bypass
Danger of Oscillations
C5, C7
0.1µF
Supply Voltage Bypass
Danger of Oscillations
C8, C9
0.1µF
Frequency Stability
Dz
5.1V
Mute Circuit
(*) Closed loop gain has to be ≥25dB
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