STCD1020 Datasheet, PDF (5/40 Pages) STMicroelectronics – Multi-channel clock distribution circuit

STCD1020, STCD1030, STCD1040
List of figures
Figure 30.
Figure 31.
Figure 32.
Figure 33.
Figure 34.
Figure 35.
Figure 36.
Figure 37.
Figure 38.
Figure 39.
STCD10x0 recovery time from standby to active (STCD1040, 1.8 V version,
EN2=EN3=EN4=0, measure CLK1 when EN1 from 0 to 1) . . . . . . . . . . . . . . . . . . . . . . . . 27
STCD10x0 buffer recovery time from off to on (STCD1040, 1.8 V version,
EN2 =EN3=EN4=1, measure CLK1 when EN1 from 0 to 1). . . . . . . . . . . . . . . . . . . . . . . . 28
Sine wave input clock vs. output clock (STCD1040, 1.8 V version, 26 MHz sine wave
master clock input from TCXO) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Rise and fall time for square wave output (STCD1040, 1.8 V version, 10MHz square wave
master clock input, C_load = 20 pF). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Input clock phase noise (STCD1040, 1.8 V version, 26 MHz master clock input
from TCXO) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Output clock phase noise (STCD1040, 1.8 V version, this phase noise includes the
additive phase noise from TCXO and STCD1040) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Clock bandwidth (STCD1040, 1.8 V version, C_load = 10 pF) . . . . . . . . . . . . . . . . . . . . . . . 30
TDFN - 8-lead, 2 x 2 mm package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
TDFN - 10-lead, 2 x 2.5 mm package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
TDFN - 12-lead, 2 x 3 mm package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
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