STCD1020 Datasheet, PDF (4/40 Pages) STMicroelectronics – Multi-channel clock distribution circuit

List of figures
List of figures
STCD1020, STCD1030, STCD1040
Figure 1.
Figure 2.
Figure 3.
Figure 4.
Figure 5.
Figure 6.
Figure 7.
Figure 8.
Figure 9.
Figure 10.
Figure 11.
Figure 12.
Figure 13.
Figure 14.
Figure 15.
Figure 16.
Figure 17.
Figure 18.
Figure 19.
Figure 20.
Figure 21.
Figure 22.
Figure 23.
Figure 24.
Figure 25.
Figure 26.
Figure 27.
Figure 28.
Figure 29.
Logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Connections diagram (STCD1020, 2-channel) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Connections diagram (STCD1030, 3-channel) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Connections diagram (STCD1040, 4-channel) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Hardware hookup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Typical application circuit using STCD1040 for RF ends of TD-SCDMA/GSM dual mode
mobile phone . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Typical application circuit using STCD1040 for baseband peripherals in mobile phone . . 12
Direct connection of the source clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Connection of the DC-CUT capacitor and bias. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Quiescent current (I_Q) vs. supply voltage (V_CC) (STCD1040, 2.8 V version,
EN1=EN2=EN3=EN4=1, no master clock input) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Quiescent current (I_Q) vs. temperature (STCD1040, 2.8 V version,
EN1=EN2=EN3=EN4=1, C_load = 30 pF, no master clock input) . . . . . . . . . . . . . . . . . . . . . 18
Standy current (I_SB) vs. supply voltage (V_CC) (STCD1040, 2.8 V version,
EN1=EN2=EN3=EN4=0, no master clock input) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Active current (I_ACT) vs. supply voltage (V_CC) (STCD1040, 2.8 V version,
EN1=EN2=EN3=EN4=1, 26 MHz sine wave master clock input from TCXO) . . . . . . . . . . 19
Active current (I_ACT) vs. master clock input voltage level (Vpp) (STCD1040, 2.8 V version,
EN1=EN2=EN3=EN4=1, 26 MHz sine wave master clock input) . . . . . . . . . . . . . . . . . . . . 20
Active current (I_ACT) vs. input frequency (STCD1040, 2.8 V version,
EN1=EN2=EN3=EN4=1, master clock input Vpp = 1 V) . . . . . . . . . . . . . . . . . . . . . . . . . . 20
STCD10x0 recovery time from standby to active (STCD1040, 2.8 V version,
EN2=EN3=EN4=0, measure CLK1 when EN1 from 0 to 1) . . . . . . . . . . . . . . . . . . . . . . . . 21
STCD10x0 buffer recovery time from off to on (STCD1040, 2.8 V version,
EN2=EN3=EN4=1, measure CLK1 when EN1 from 0 to 1) . . . . . . . . . . . . . . . . . . . . . . . . 21
Sine wave input clock vs. output clock (STCD1040, 2.8 V version, 26 MHz sine wave
master clock input from TCXO) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Rise and fall time for square wave output (STCD1040, 2.8 V, 10 MHz square wave
master clock input, C_load = 20 pF) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Input clock phase noise (STCD1040, 2.8 V version, 26 MHz master clock input
from TCXO) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Output clock phase noise (STCD1040, 2.8V version, this phase noise includes the
additive phase noise from TCXO and STCD1040) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Clock bandwidth (STCD1040, 2.8 V version, C_load = 10 pF) . . . . . . . . . . . . . . . . . . . . . . . 24
Quiescent current (I_Q) vs. supply voltage (V_CC) (STCD1040, 1.8 V version,
EN1=EN2=EN3=EN4=1, no master clock input) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Quiescent current (I_Q) vs. temperature (STCD1040, 1.8 V version,
EN1=EN2=EN3=EN4=1, C_load = 30 pF, no master clock input) . . . . . . . . . . . . . . . . . . . . 25
Standby current (I_SB) vs. supply voltage (V_CC) (STCD1040, 1.8 V version,
EN1=EN2=EN3=EN4=0, no master clock input) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Active current (I_ACT) vs. supply voltage (V_CC) (STCD1040, 1.8 V version,
EN1=EN2=EN3=EN4=1, 26 MHz sine wave master clock input from TCXO) . . . . . . . . . . 26
Active current (I_ACT) vs. master clock input voltage level (Vpp) (STCD1040, 1.8 V version,
EN1=EN2=EN3=EN4=1, 26 MHz sine wave master clock input) . . . . . . . . . . . . . . . . . . . . 26
Active current (I_ACT) vs. input frequency (STCD1040, 1.8 V version,
EN1=EN2=EN3=EN4=1, master clock input Vpp=1 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
4/40