MIC2593 Datasheet, PDF (5/26 Pages) STMicroelectronics – Dual-Slot PCI Hot Plug Controller

MIC2593
Pin Description (cont)
Pin Number
13
24
Pin Name
3VSENSEA
3VSENSEB
16
3VOUTA
21
3VOUTB
14
3VGATEA
23
3VGATEB
11
VSTBYA
26
VSTBYB
15
VAUXA
22
VAUXB
44
ONA
43
ONB
45
AUXENA
42
AUXENB
2
CFILTERA
35
CFILTERB
1
/FAULTA
36
/FAULTB
Micrel
Pin Function
3V Circuit Breaker Sense Input [A/B]: The current limit thresholds are set by
connecting sense resistors between these pins and 3VIN[A/B]. When the
current limit threshold of IR = 50mV is reached, the 3VGATE[A/B] pin is
modulated to maintain a constant voltage across the sense resistor and
therefore a constant current into the load. If the 50mV threshold is exceeded
for t_FLT (see CFILTER[A/B] pin description), the circuit breaker is tripped
and the GATE pin for the affected supply’s external MOSFET is immediately
pulled low.
3.3V Power-Good Sense Inputs: Connect to 3.3V[A/B] outputs. Used to
monitor the 3.3V output voltages for Power-is-Good status.
3V Gate Drive Output [A/B]: Each pin connects to the gate of an external
N-channel MOSFET. During power-up, the C_GATE and the C_GS of the
MOSFETs are connected to a 25µA current source. This controls the value
of dv/dt seen at the source of the MOSFETs, and hence the current flowing
into the load capacitance.
During current limit events, the voltage at this pin is adjusted to maintain
constant current through the switch for a period of t_FLT. Whenever an
overcurrent, thermal shutdown, or input undervoltage fault condition occurs,
the GATE pin for the affected slot is immediately brought low. During power
down, these pins are discharged by an internal current source.
3.3V Standby Input Voltage: Required to support PCI VAUX output.
Additionally, the SMBus logic and internal registers run off of VSTBY[A/B]
to ensure that the MIC2593 is accessible during standby modes. A UVLO
circuit prevents turn-on of this supply until VSTBY[A/B] rises above its UVLO
threshold. Both pins must be connected together externally at the IC.
3.3VAUX[A/B] Output to PCI Card Slot: These outputs connect
the 3.3AUX pin of the PCI connectors to VSTBY[A/B] via internal
400mΩ MOSFETs. These outputs are current limited and protected against
short-circuit faults.
Enable Inputs: Rising-edge triggered. Used to enable or disable the MAINA
and MAINB (5V, 3.3V, +12V and –12V) outputs. Taking ON[A/B] low after a
fault resets the 5V, 3.3V, +12V and/or –12V fault latches for the affected slot.
Tie these pins to GND if using SMI power control. Also, see pin description
for /FAULTA and /FAULTB.
Enable Inputs: Rising-edge triggered. Used to enable or disable VAUXA and
VAUXB outputs. Taking AUXEN[A/B] low after a fault resets the respective
slot’s Aux Output Fault Latch. Tie these pins to GND if using SMI power
control. Also, see pin description for /FAULTA and /FAULTB.
Overcurrent Timer (Filter) Capacitor [A/B]: Capacitors connected between
these pins and GND set the duration of t_FLT. t_FLT is the amount of time for
which a slot remains in current limit before its circuit breaker is tripped.
/FAULT[A/B] Outputs: Open-drain, active-low. Asserted whenever the
circuit breaker trips due to a fault condition (overcurrent, input undervoltage,
overtemperature). Each pin requires an external pull-up resistor to VSTBY.
Bringing the slot’s ON[A/B] pin low resets /FAULT[A/B] if /FAULT[A/B]
was asserted in response to a fault condition on one of the slot’s MAIN
outputs (5V, 3.3V, +12V, or –12V).
/FAULT[A/B] is reset by bringing the slot’s AUXEN[A/B] pin low if
/FAULT[A/B] was asserted in response to a fault condition on the slot’s V_AUX
output. If a fault condition occurred on both the MAIN and VAUX[A/B]
outputs of the same slot, then both ON[A/B] and AUXEN[A/B] must be
brought low to de-assert the /FAULT[A/B] output.
April 2004
5
M9999-042204