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HCC4015B Datasheet, PDF (5/12 Pages) STMicroelectronics – DUAL 4-STAGE STATIC SHIFT REGISTER WITH SERIAL INPUT/PARALLEL OUTPUT
HCC/HCF4015B
DYNAMIC ELECTRICAL CHARACTERISTICS (T amb = 25 °C, CL = 50 pF, RL = 200 kΩ,
typical temperature coefficient for all VDD values is 0.3 %/°C, all input rise and fall times = 20 ns)
Symbol
Parameter
CLOCKED OPERATION
Test Conditions
V al ue
V D D (V) Min. Typ. Max.
Unit
tP L H, tP HL Propagation Delay Time
(carry out or decoded out lines)
5
160 320
10
80 160 ns
15
60 120
t THL , tT L H Transition Time
(carry out or decoded out lines)
fCL
Maximum Clock Input Frequency
5
100 200
10
50 100
ns
15
40 80
5
3
6
10
6
12
MHz
tW
Clock Pulse Width
15
8.5 17
5
180 90
10
80 40
ns
15
50 25
t r, tf* Clock Input Rise or Fall Time
5
15
10
15
µs
t se tu p Data Setup Time
15
15
5
70 35
10
40 20
ns
15
30 15
RESET OPERATION
tP L H, tP HL Propagation Delay Time
5
200 400
10
100 200 ns
15
80 160
tW
Reset Pulse Width
5
200 100
10
80 40
ns
15
60 30
* If more than unit is cascaded in the parallel clocked application, trCL should be made less than or equal to the sum of the fixed propagation delay
at 15pF and the transition time of the carry output driving stage for the estimated capacitive load.
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