AN2628 Datasheet, PDF (5/27 Pages) STMicroelectronics – Programming ST10F27x CAN interrupt drivers

AN2628
Interrupt sources and identification
In summary: To enable CAN interrupt to the CPU, set bit IE in the CAN control register,
corresponding enable bit in the XIRxSEL register (x = 0, 3 for CAN1, x = 1, 3 for CAN2) and
bit XPxIE in the X-peripherals interrupt control register XPxIC. Please refer to Appendix A:
Register description.
1.2
1.2.1
Note:
1.2.2
Individual interrupt sources
The CAN controller distinguishes three different individual interrupt sources:
● Status interrupts
● Error interrupts
● Message-specific interrupts
Status interrupts
Status interrupts are generated after a status change of the CAN modules is indicated by
the flags in the status register. Status interrupts are enabled by setting bit SIE in the control
register.
Status interrupts are caused by:
● Successful transmission from the CAN modules (TxOK is set) of any message from
message objects
● Reception of a message on the CAN bus - RxOK is set after an acknowledge of a CAN
frame from the CAN module - this CAN frame may not correspond to any message
object identifier.
● Occurrence of an error on the CAN bus during a message transfer (LEC bit field is
updated); this error may not come from the CAN module itself but has at least been
detected by the CAN modules. LEC code 7 is not used and may be written to 7 by the
CPU to check for updates.
TxOK, RxOK, LEC can be read from the status register.
Enabling the Status Change Interrupt causes an interrupt to the CPU every time a message
is acknowledged on the CAN bus. For this reason, Status Change Interrupt should be
disabled in most applications except where a close monitor on the bus activity is required
(for example, after an early warning).
Error interrupts
Error Interrupts are generated once predefined error conditions are reached. Error interrupts
are enabled by setting bit EIE in the control register. Error interrupts are caused by:
● Warning status (EWarn is set) indicating that at least one of the error counters has
reached the error warning limit of 96
● Bus-off (BOff is set) indicating that the CAN controller is in bus-off state
EWarn and BOff can be read from the status register.
5/27