ST10F168 Datasheet, PDF(48/74 Page) STMicroelectronics – 16-BIT MCU WITH 256K BYTE FLASH MEMORY AND 8K BYTE RAM

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ST10F168 Datasheet, PDF (48/74 Pages) STMicroelectronics – 16-BIT MCU WITH 256K BYTE FLASH MEMORY AND 8K BYTE RAM

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ST10F168

Table 22 : Special Function Registers listed by name

Name

T6CON

T6IC

T78CON b

T7IC

T7REL

T8IC

T8REL

TFR

WDT

WDTCON b

XP0IC

XP1IC

XP2IC

XP3IC

ZEROS

Physical

address

FE48h

FF48h

FF68h

F050h E

FF20h

F17Ah E

F054h E

F052h E

F17Ch E

F056h E

FFACh

FEAEh

FFAEh

F186h E

F18Eh E

F196h E

F19Eh E

FF1Ch

8-bit

address

Description

24h GPT2 Timer 6 Register

A4h GPT2 Timer 6 Control Register

B4h GPT2 Timer 6 Interrupt Control Register

28h CAPCOM Timer 7 Register

90h CAPCOM Timer 7 and 8 Control Register

BEh CAPCOM Timer 7 Interrupt Control Register

2Ah CAPCOM Timer 7 Reload Register

29h CAPCOM Timer 8 Register

BFh CAPCOM Timer 8 Interrupt Control Register

2Bh CAPCOM Timer 8 Reload Register

D6h Trap Flag Register

57h Watchdog Timer Register (read only)

D7h Watchdog Timer Control Register

C3h CAN Module Interrupt Control Register

C7h X-Peripheral 1 Interrupt Control Register

CBh X-Peripheral 2 Interrupt Control Register

CFh PLL unlock Interrupt Control Register

8Eh Constant Value 0âs Register (read only)

Reset

value

0000h

000xh3

0000h4

0000h

Notes: 1. The value depends on the silicon revision and is described in the chapter 19.1.

2. The system configuration is selected during reset.

3. Bit WDTR indicates a watchdog timer triggered reset.

4. The XPnIC Interrupt Control Registers control the interrupt requests from integrated X-Bus peripherals. Nodes where no

X-Peripherals are connected may be used to generate software controlled interrupt requests by setting the respective XPnIR bit.

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