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ST10F168 Datasheet, PDF (1/74 Pages) STMicroelectronics – 16-BIT MCU WITH 256K BYTE FLASH MEMORY AND 8K BYTE RAM | |||
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ST10F168
16-BIT MCU WITH 256K BYTE FLASH MEMORY AND 8K BYTE RAM
s HIGH PERFORMANCE CPU
â 16-BIT CPU WITH 4-STAGE PIPELINE
â 80ns INSTRUCTION CYCLE TIME AT 25MHz
CPU CLOCK
â 400ns 16 X 16-BIT MULTIPLICATION
â 800ns 32 / 16-BIT DIVISION
â ENHANCED BOOLEAN BIT MANIPULATION
FACILITIES
â ADDITIONAL INSTRUCTIONS TO SUPPORT
HLL AND OPERATING SYSTEMS
â SINGLE-CYCLE CONTEXT SWITCHING SUP-
PORT
s MEMORY ORGANIZATION
â 256K BYTE ON-CHIP FLASH MEMORY
â 10K ERASING / PROGRAMMING CYCLES
â UP TO 16M BYTE LINEAR ADDRESS SPACE
FOR CODE AND DATA (5M BYTE WITH CAN)
â 2K BYTE ON-CHIP INTERNAL RAM (IRAM)
â 6K BYTE ON-CHIP EXTENSION RAM (XRAM)
â 20 YEAR DATA RETENTION TIME
s FAST AND FLEXIBLE BUS
â PROGRAMMABLE EXTERNAL BUS CHARAC-
TE- RISTICS FOR DIFFERENT ADDRESS
RANGES
â 8-BIT OR 16-BIT EXTERNAL DATA BUS
â MULTIPLEXED OR DEMULTIPLEXED EXTER-
NAL ADDRESS / DATA BUSES
â FIVE PROGRAMMABLE CHIP-SELECT SIGNALS
â HOLD-ACKNOWLEDGE BUS ARBITRATION
SUPPORT
s INTERRUPT
â 8-CHANNEL PERIPHERAL EVENT CONTROL-
LER FOR SINGLE CYCLE, INTERRUPT DRIVEN
DATA TRANSFER
â 16-PRIORITY-LEVEL INTERRUPT SYSTEM
WITH 56 SOURCES, SAMPLE-RATE DOWN TO
40ns
s TIMERS
â TWO MULTI-FUNCTIONAL GENERAL PUR-
POSE TIMER UNITS WITH 5 TIMERS
â TWO 16-CHANNEL CAPTURE / COMPARE
UNITS.
s 4-CHANNEL PWM UNIT
s SERIAL CHANNELS
â SYNCHRONOUS / ASYNCHRONOUS SERIAL
CHANNEL
â HIGH-SPEED SYNCHRONOUS CHANNEL
PQFP144 (28 x 28 mm)
(Plastic Quad Flat Pack)
s A/D CONVERTER
â 16-CHANNEL 10-BIT
â 7.76µS CONVERSION TIME
s FAIL-SAFE PROTECTION
â PROGRAMMABLE WATCHDOG TIMER
â OSCILLATOR WATCHDOG
s ON-CHIP CAN 2.0B INTERFACE
s ON-CHIP BOOTSTRAP LOADER
s CLOCK GENERATION
â ON-CHIP PLL
â DIRECT OR PRESCALED CLOCK INPUT.
s UP TO 111 GENERAL PURPOSE I/O LINES
â INDIVIDUALLY PROGRAMMABLE AS INPUT,
OUTPUT OR SPECIAL FUNCTION.
â PROGRAMMABLE THRESHOLD (HYSTERESIS)
s IDLE AND POWER DOWN MODES
s SINGLE VOLTAGE SUPPLY: 5V ±10%
s 144-PIN PQFP PACKAGE
FLASH
CPU Core
PEC
Interrupt controller
RAM
Watchdog
OSC
P.0
P.1
P.4
BRG BRG
P.6
P.5
P.3
P.7
P.8
January 2002
This is advance information on a new product now in development or undergoing evaluation. Details are subject to change without notice.
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