STW82100B Datasheet, PDF (47/67 Pages) STMicroelectronics – RF down converter with embedded integer-N synthesizer

STW82100B
10 SPI digital interface
SPI digital interface
10.1
SPI general features
The SPI digital interface is selected by hardware connection of the pin 25 (DBUS_SEL) to
3.3 V.
The STW82100B IC is programmed by means of a high-speed serial-to-parallel interface
with write option only. The 3-wires bus can be clocked at a frequency as high as 100 MHz to
allow fast programming of the registers containing the data for RF IC configuration.
The programming of the chip is done through serial words with whole length of 26 bits. The
first 2 MSB represent the address of the registers. The others 24 LSB represent the value of
the registers.
Each data bit is stored in the internal shift register on the rising edge of the CLOCK signal.
On the rising edge of the LOAD signal the outputs of the selected register are sent to the
device.
Figure 21. SPI input and output bit order
DATA
Last
bit sent
(LSB) 0 ₁ 2
23 25 (MSB)
24
A1
LOAD
Address
decoder
LOAD #4
00 (LSB)
Reg. #0
Reg. #1
Reg. #4
Doc ID 018355 Rev 5
47/67