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STM32F070CB Datasheet, PDF (45/83 Pages) STMicroelectronics – Reset and power management
STM32F070CB/RB/C6/F6
Electrical characteristics
6.3.6
where
ISW is the current sunk by a switching I/O to charge/discharge the capacitive load
VDDIOx is the I/O supply voltage
fSW is the I/O switching frequency
C is the total capacitance seen by the I/O pin: C = CINT + CEXT + CS
CS is the PCB board capacitance including the pad pin.
The test pin is configured in push-pull output mode and is toggled by software at a fixed
frequency.
Table 28. Switching output I/O current consumption
Symbol
Parameter
Conditions(1)
I/O toggling
frequency (fSW)
Typ
Unit
4 MHz
0.18
VDDIOx = 3.3 V
CEXT = 0 pF
C = CINT + CEXT+ CS
8 MHz
0.37
16 MHz
0.76
24 MHz
1.39
48 MHz
2.188
ISW
I/O current
consumption
VDDIOx = 3.3 V
CEXT = 22 pF
C = CINT + CEXT+ CS
4 MHz
8 MHz
16 MHz
24 MHz
0.49
0.94
mA
2.38
3.99
1. CS = 7 pF (estimated value).
VDDIOx = 3.3 V
CEXT = 47 pF
C = CINT + CEXT+ CS
C = Cint
4 MHz
0.81
8 MHz
1.7
16 MHz
3.67
Wakeup time from low-power mode
The wakeup times given in Table 29 are the latency between the event and the execution of
the first user instruction. The device goes in low-power mode after the WFE (Wait For
Event) instruction, in the case of a WFI (Wait For Interruption) instruction, 16 CPU cycles
must be added to the following timings due to the interrupt latency in the Cortex M0
architecture.
The SYSCLK clock source setting is kept unchanged after wakeup from Sleep mode.
During wakeup from Stop or Standby mode, SYSCLK takes the default setting: HSI 8 MHz.
The wakeup source from Sleep and Stop mode is an EXTI line configured in event mode.
The wakeup source from Standby mode is the WKUP1 pin (PA0).
All timings are derived from tests performed under the ambient temperature and supply
voltage conditions summarized in Table 20: General operating conditions.
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