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STD11N60DM2 Datasheet, PDF (4/15 Pages) STMicroelectronics – N-channel 600 V, 0.370 (ohm) typ., 10 A MDmesh DM2 Power MOSFET in a DPAK package
Electrical characteristics
STD11N60DM2
2
Electrical characteristics
(Tcase = 25 °C unless otherwise specified)
Table 5: Static
Symbol
Parameter
Test conditions
V(BR)DSS
Drain-source
breakdown voltage
VGS = 0 V, ID = 1 mA
IDSS
Zero gate voltage
drain current
VGS = 0 V, VDS = 600 V
VGS = 0 V, VDS = 600 V,
Tcase = 125 °C(1)
IGSS
Gate-body leakage
current
VDS = 0 V, VGS = ±25 V
VGS(th)
Gate threshold
voltage
VDS = VGS, ID = 250 µA
RDS(on)
Static drain-source
on-resistance
VGS = 10 V, ID = 5 A
Min. Typ. Max. Unit
600
V
1.5
µA
100
±10 µA
3
4
5
V
0.370 0.420 Ω
Notes:
(1)Defined by design, not subject to production test.
Symbol
Ciss
Coss
Crss
Coss eq.(1)
RG
Qg
Qgs
Qgd
Parameter
Input capacitance
Output capacitance
Reverse transfer
capacitance
Equivalent output
capacitance
Intrinsic gate
resistance
Total gate charge
Gate-source charge
Gate-drain charge
Table 6: Dynamic
Test conditions
VDS = 100 V, f = 1 MHz,
VGS = 0 V
Min. Typ. Max. Unit
- 614 -
-
32
-
pF
- 1.08 -
VDS = 0 to 480 V, VGS = 0 V
-
57
-
pF
f = 1 MHz, ID = 0 A
- 6.2 -
Ω
VDD = 480 V, ID = 10 A,
- 16.5 -
VGS = 10 V (see Figure 15: "Test - 3.8 - nC
circuit for gate charge behavior") -
9.2
-
Notes:
(1) Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS
increases from 0 to 80% VDSS.
Symbol
td(on)
tr
td(off)
tf
Parameter
Turn-on delay time
Rise time
Turn-off delay time
Fall time
Table 7: Switching times
Test conditions
Min. Typ. Max. Unit
VDD = 300 V, ID = 5 A RG = 4.7 Ω, - 11.7 -
VGS = 10 V (see Figure 14: "Test
-
6.3
-
circuit for resistive load switching
ns
times" and Figure 19: "Switching
-
31
-
time waveform")
- 9.5 -
4/15
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