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STD10N60DM2 Datasheet, PDF (4/14 Pages) STMicroelectronics – Zener-protected
Electrical characteristics
STD10N60DM2
2
Electrical characteristics
(Tcase = 25 °C unless otherwise specified)
Table 5: Static
Symbol
Parameter
Test conditions
V(BR)DSS
Drain-source
breakdown voltage
VGS = 0 V, ID = 1 mA
VGS = 0 V, VDS = 600 V
IDSS
Zero gate voltage drain
current
VGS = 0 V, VDS = 600 V,
Tcase = 125 °C(1)
IGSS
Gate-body leakage
current
VDS = 0 V, VGS = ±25 V
VGS(th)
RDS(on)
Gate threshold voltage
Static drain-source on-
resistance
VDS = VGS, ID = 250 µA
VGS = 10 V, ID = 4 A
Min. Typ. Max. Unit
600
V
1.5
µA
100
±10 µA
3
4
5
V
0.440 0.530 Ω
Notes:
(1)Defined by design, not subject to production test.
Symbol
Ciss
Coss
Crss
Coss eq.(1)
RG
Qg
Qgs
Qgd
Parameter
Input capacitance
Output capacitance
Reverse transfer
capacitance
Equivalent output
capacitance
Intrinsic gate resistance
Total gate charge
Gate-source charge
Gate-drain charge
Table 6: Dynamic
Test conditions
VDS = 100 V, f = 1 MHz,
VGS = 0 V
VDS = 0 to 480 V, VGS = 0 V
f = 1 MHz, ID = 0 A
VDD = 480 V, ID = 8 A,
VGS = 10 V (see Figure 15:
"Test circuit for gate charge
behavior")
Min. Typ. Max. Unit
- 529 -
-
28
-
pF
- 0.72 -
-
47
-
pF
- 6.5 -
Ω
-
15
-
- 3.7 - nC
-
8
-
Notes:
(1) Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS
increases from 0 to 80% VDSS.
Symbol
td(on)
tr
td(off)
tf
Parameter
Turn-on delay time
Rise time
Turn-off delay time
Fall time
Table 7: Switching times
Test conditions
VDD = 300 V, ID = 4 A
RG = 4.7 Ω, VGS = 10 V (see
Figure 14: "Test circuit for
resistive load switching times"
and Figure 19: "Switching time
waveform")
Min. Typ. Max. Unit
-
11
-
-
5
-
-
28
-
ns
- 11.5 -
4/14
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