STB23N80K5 Datasheet, PDF (4/15 Pages) STMicroelectronics – Ultra low gate charge

Electrical characteristics
STB23N80K5
2
Electrical characteristics
(Tcase = 25 °C unless otherwise specified)
Table 5: Static
Symbol
Parameter
Test conditions
V(BR)DSS
Drain-source breakdown
voltage
VGS = 0 V, ID = 1 mA
IDSS
IGSS
VGS(th)
RDS(on)
Zero gate voltage drain
current
Gate-body leakage current
Gate threshold voltage
Static drain-source on-
resistance
VGS = 0 V, VDS = 800 V
VGS = 0 V, VDS = 800 V,
Tcase = 125 °C
VDS = 0 V, VGS = ±20 V
VDS = VGS, ID = 100 µA
VGS = 10 V, ID = 8 A
Min. Typ. Max. Unit
800
V
1
µA
50
±10 µA
3
4
5
V
0.23 0.28 Ω
Symbol
Parameter
Ciss Input capacitance
Coss Output capacitance
Crss
Reverse transfer
capacitance
CO(tr)⁽¹⁾
Equivalent output
capacitance
CO(er)⁽²⁾
Equivalent output
capacitance
RG Intrinsic gate resistance
Qg Total gate charge
Qgs Gate-source charge
Qgd Gate-drain charge
Table 6: Dynamic
Test conditions
VDS = 100 V, f = 1 MHz,
VGS = 0 V
VDS = 0 to 640 V, VGS = 0 V
VDS = 0 to 640 V, VGS = 0 V
f = 1 MHz, ID = 0 A
VDD = 640 V, ID = 16 A,
VGS = 10 V (see Figure 14:
"Test circuit for gate charge
behavior")
Min. Typ. Max. Unit
- 1000 -
-
65
-
pF
-
1.5
-
- 165 -
pF
-
59
-
- 4.7
-
Ω
-
33
-
-
6
- nC
-
25
-
Notes:
(1) _{Time related is defined as a constant equivalent capacitance giving the same charging time as COSS when VDS}
increases from 0 to 80% VDSS.
(2) _{Energy related is defined as a constant equivalent capacitance giving the same stored energy as COSS when}
VDS increases from 0 to 80% VDSS
Symbol
Parameter
td(on)
tr
td(off)
Turn-on delay time
Rise time
Turn-off delay time
tf
Fall time
Table 7: Switching times
Test conditions
VDD = 400 V, ID = 8 A
RG = 4.7 Ω, VGS = 10 V (see
Figure 13: "Test circuit for
resistive load switching times"
and Figure 18: "Switching time
waveform")
Min. Typ. Max. Unit
-
14
-
-
9
-
-
48
-
ns
-
9
-
4/15
DocID028291 Rev 1