M41ST87Y_10 Datasheet, PDF (32/52 Pages) STMicroelectronics – 5.0 V and 3.3/3.0 V secure serial RTC and NVRAM supervisor with tamper detection and 128 bytes of clearable NVRAM

Clock operation
M41ST87Y, M41ST87W
Therefore, each calibration step has the effect of adding 512 or subtracting 256 oscillator
cycles for every 125,829,120 actual oscillator cycles, that is +4.068 or –2.034 ppm of
adjustment per calibration step in the calibration register. Assuming that the oscillator is
running at exactly 32,768 Hz, each of the 31 increments in the calibration byte would
represent +10.7 or –5.35 seconds per month which corresponds to a total range of +5.5 or
–2.75 minutes per month.
Two methods are available for ascertaining how much calibration a given M41ST87Y/W may
require.
The first involves setting the clock, letting it run for a month and comparing it to a known
accurate reference and recording deviation over a fixed period of time. Calibration values,
including the number of seconds lost or gained in a given period, can be found in application
note AN934, “TIMEKEEPER^® calibration.” This allows the designer to give the end user the
ability to calibrate the clock as the environment requires, even if the final product is
packaged in a non-user serviceable enclosure. The designer could provide a simple utility
that accesses the calibration byte.
The second approach is better suited to a manufacturing environment, and involves the use
of the SQW/FT pin. The pin will toggle at 512 Hz, when the stop bit (ST) is '0,' the frequency
test bit (FT) is '1,' and SQWE is '0.'
Any deviation from 512 Hz indicates the degree and direction of oscillator frequency shift at
the test temperature. For example, a reading of 512.010124 Hz would indicate a +20 ppm
oscillator frequency error, requiring a –10 (XX001010) to be loaded into the calibration byte
for correction. Note that setting or changing the calibration byte does not affect the
frequency test output frequency.
If the SQWOD bit = '1,' the SQW/FT pin is an open drain output which requires a pull-up
resistor to V_CC for proper operation. A 500 to 10 kΩ resistor is recommended in order to
control the rise time. The FT bit is cleared on power-down.
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Doc ID 9497 Rev 8