M41ST87Y_10 Datasheet, PDF (20/52 Pages) STMicroelectronics – 5.0 V and 3.3/3.0 V secure serial RTC and NVRAM supervisor with tamper detection and 128 bytes of clearable NVRAM

Operating modes
Figure 14. Tamper detect connection options
TAMPER LO
(TPMX = 0)
I.
II.
NORMALLY
OPEN
(TCMX = 1)
TPIN
M41ST87Y, M41ST87W
TAMPER HI
(TPMX = 1)
VOUT(1)
TPIN
III.
NORMALLY
CLOSED
(TCMX = 0)
VOUT(2)
TPIN
TCHI/TCLO = 1
IV.
VCC
(3)
TCHI/TCLO = 0
TCHI/TCLO = 1
VOUT (Int)
TCHI/TCLO = 0
Note:
These options are summarized in Table 3.
1. If the CLRX_EXT bit is set, a second tamper to V_OUT (TPM2 = '1') during t_CLR will not be detected.
2. If the CLRX_EXT bit is set, a second tamper to V_OUT (TPM2 = '1') will trigger automatically.
3. Optional external resistor to V_CC allows the user to bypass sampling when power is “on.”
Table 3. Tamper detection truth table
Option
Mode
I
Normally open/tamper to GND⁽¹⁾
II
Normally open/tamper to V_OUT(1)
III
Normally closed/tamper to GND
IV
Normally closed/tamper to V_OUT
1. No battery current drawn during battery backup.
TCM_X
1
1
0
0
AI07075
TPM_X
0
1
0
1
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Doc ID 9497 Rev 8