STM690A Datasheet, PDF (31/37 Pages) STMicroelectronics – 5V Supervisor with Battery Switchover

STM690A/692A/703/704/802/805/817/818/819
Sym
Alter-
native
Description
Test Condition⁽¹⁾
Min
Typ
Max Unit
Push-button Reset Input (STM703/704/819)
STM703/704
150
ns
t_MLMH
t_MR
MR Pulse Width
STM819
1
µs
t_MLRL t_MRD MR to RST Output Delay
STM703/704
STM819
250 ns
120
ns
MR Glitch Immunity
STM819
100
ns
MR Pull-up Resistor
MR = 0V, V_CC = 5V
45
63
85
kΩ
Watchdog Timer (NOT available on STM703/704/819)
t_WD Watchdog Timeout Period
V_RST (max) < V_CC < 5.5V
1.12
1.60
2.24
s
WDI Pulse Width
V_RST (max) < V_CC < 5.5V
50
ns
Chip-Enable Gating (STM818 only)
E-to-E_CON Resistance
V_CC = V_RST (max)
40
150
Ω
E-to-E_CON Propagation Delay
4.5V < V_CC < 5.5V
2
7
ns
Reset-to-E_CON High Delay
(Power-down)
15
µs
E_CON Short Circuit Current
V_CC = 5V, Disable Mode,
E = Logic high, E_CON = 0V
0.1
0.75
2.0 mA
Note: 1. Valid for Ambient Operating Temperature: TA = –40 to 85°C; VCC = 4.75V to 5.5V for “L” versions; VCC = 4.5V to 5.5V for “M” ver-
sions; and V_BAT = 2.8V (except where noted).
2. VCC supply current, logic input leakage, Watchdog functionality, Push-button Reset functionality, PFI functionality, state of RST and
RST tested at V_BAT = 3.6V, and V_CC = 5.5V. The state of RST or RST and PFO is tested at V_CC = V_CC (min). Either V_CC or V_BAT
can go to 0V if the other is greater than 2.0V.
3. V_CC (min) = 1.0V for T_A = 0°C to +85°C.
4. Tested at VBAT = 3.6V, VCC = 3.5V and 0V.
5. Guaranteed by design.
6. WDI input is designed to be driven by a three-state output device. To float WDI, the “high impedance mode” of the output device
must have a maximum leakage current of 10µA and a maximum output capacitance of 200pF. The output device must also be able
to source and sink at least 200µA when active.
7. When VBAT > VCC > VRST, VOUT remains connected to VCC until VCC drops below VRST.
8. When V_RST > V_CC > V_BAT, V_OUT remains connected to V_CC until V_CC drops below the battery voltage (V_BAT) – 75mV.
9. For VCC falling.
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