TDA7415CB Datasheet, PDF (30/50 Pages) STMicroelectronics – Car radio multimedia signal processor

Description of the audio processor
TDA7415CB
The spectrum analyzer's input signal is either the mono-sum of the stereo MUXA-output or
alternatively a signal input at the SAin-pin. In order to have some influence on the visual
behavior in a given application the filter quality for all band-pass filters may be programmed
for two different qualities, with the higher filter quality creating a faster, more differentiating
optical response. If the spectrum analyzer is disabled both, the SAres- and the SAclk-pin
should be tied to ground.
Figure 21. Spectrum analyzer block diagram
The microprocessor starts a read cycle with a negative going clock edge at the SAclk input.
On the following positive clock edges, the stored peak signal level of the band pass filters is
subsequently switched to SAout. Each analog output value is valid after the time t_SAdel. A
reset of the sample capacitors is triggered by either pulling the SAres-pin low any time or by
setting-up the spectrum-analyzer for Auto-reset mode. Although not shown in Figure 22, for
the Auto-reset mode a reset is generated whenever SAclk remains high for the time t_intres.
Note that a proper auto-reset requires the clock signal SAclk to be held at high potential and
that the reset is not repetitive. Once a reset was triggered, a new read-out cycle should not
be initiated before the time t_repeat has passed. This allows sufficient settling of the filters.
Figure 22 illustrates the read cycle timing of the spectrum analyzer.
Figure 22. Read cycle timing diagram
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