 English |
|
|
|
|
|
|
|
| STM32F103X4 Datasheet, PDF (30/80 Pages) STMicroelectronics – Low-density performance line, ARM-based 32-bit MCU with 16 or 32 KB Flash, USB, CAN, 6 timers, 2 ADCs, 6 communication interfaces | |||
| |||
| ◁ |
Electrical characteristics
STM32F103x4, STM32F103x6
Table 7. Current characteristics
Symbol
Ratings
Max.
Unit
IVDD
IVSS
IIO
IINJ(PIN) (2)(3)
ïIINJ(PIN)(2)
Total current into VDD/VDDA power lines (source)(1)
Total current out of VSS ground lines (sink)(1)
Output current sunk by any I/O and control pin
Output current source by any I/Os and control pin
Injected current on NRST pin
Injected current on HSE OSC_IN and LSE OSC_IN pins
Injected current on any other pin(4)
Total injected current (sum of all I/O and control pins)(4)
150
150
25
ï 25
mA
±5
±5
±5
± 25
1. All main power (VDD, VDDA) and ground (VSS, VSSA) pins must always be connected to the external power
supply, in the permitted range.
2. IINJ(PIN) must never be exceeded. This is implicitly insured if VIN maximum is respected. If VIN maximum
cannot be respected, the injection current must be limited externally to the IINJ(PIN) value. A positive
injection is induced by VIN > VDD while a negative injection is induced by VIN < VSS.
3. Negative injection disturbs the analog performance of the device. See note in Section 5.3.17: 12-bit ADC
characteristics.
4. When several inputs are submitted to a current injection, the maximum ïIINJ(PIN) is the absolute sum of the
positive and negative injected currents (instantaneous values). These results are based on
characterization with ïIINJ(PIN) maximum current injection on four I/O port pins of the device.
Table 8. Thermal characteristics
Symbol
Ratings
Value
Unit
TSTG
TJ
Storage temperature range
Maximum junction temperature
â65 to +150
°C
150
°C
5.3
5.3.1
Operating conditions
General operating conditions
Table 9. General operating conditions
Symbol
Parameter
Conditions
Min Max Unit
fHCLK Internal AHB clock frequency
0
fPCLK1 Internal APB1 clock frequency
0
fPCLK2 Internal APB2 clock frequency
0
VDD
Standard operating voltage
2
VDDA(1)
Analog operating voltage
(ADC not used)
Analog operating voltage
(ADC used)
2
Must be the same potential
as VDD(2)
2.4
VBAT Backup operating voltage
1.8
72
36 MHz
72
3.6
V
3.6
V
3.6
3.6
V
30/80
Doc ID 15060 Rev 3
|
▷ |
German
Russian
Spanish
Italian
Polish
Chinese
Japanese
Korean
French
Portuguese