STE12PS Datasheet, PDF (30/44 Pages) STMicroelectronics – 12 channel integrated PSE line manager

I2C slave protocol overview
STE12PS
5.7
Parallel monitoring interface
In order to monitor the status of the different ports without the I²C register addressing, a
simple, output status interface has been implemented.
This digital interface is comprised of 9 output pins: CH_SEL[3:0], POK, OVLD, OVCUR,
AC_DC_DISCON and DET_CLASS.
Bits CH_SEL[3:0] indicate the channel status flags (POK,..., DET_CLASS) that are currently
notified, externally. CH_SEL is incremented every 60MCLK clock cycles.
POK stands for Power OK. When HIGH, it indicates that the channel is currently powered-on
in normal condition.
OVLD stands for OverLoad and indicates a faulty condition due to abnormal power
dissipation (more than Pclass) of a powered channel.
OVCUR stands for OverCurrent, and it highlights a channel whose current has reached the
power-on current limit of 425mA (typ. value).
Bit AC_DC_DISCON goes HIGH when a powered channel fails in providing a correct MPS
(maintain power signature). This typically happens when a PD is disconnected from the line.
t(s) ^{DET_CLASS indicates a situation where a channel is not yet powered and whose}
“signature” is currently being probed.
uc _{Status flag notification is enabled by bit STATUS_FLAG_EN of the configuration register}
rod ^{Global_cfg2. By default this bit is HIGH, that is, enabled.}
P ^{This information is particularly useful in simple applications without a microprocessor or for}
testing purposes. Another use is to easily build-up an LED graphical interface showing
Obsolete ^{Product(s) - Obsolete runtime status of the various channels.}
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