QAMI5107 Datasheet, PDF (3/6 Pages) STMicroelectronics – Low-cost QAM demodulator and MPEG2 decoder SOC for set-top boxes

QAMi5107
Description
● Additional I²C bus (I²C repeater) dedicated to tuner control for minimum tuner
disturbance
● Programmable clock derived from system clock and available for external use
● Parallel and serial output interfaces, with DVB common interface support
● On chip voltage regulator
● CMOS technology, 1.0 V operation
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Decoder features
● Enhanced ST20 32-bit VL-RISC CPU
– 200-MHz, single cycle cache, 4-Kbyte instruction cache, 4-Kbyte data cache, 2-Kbyte
SRAM
● Unified memory interface
– Up to 166 MHz,16-bit wide SDRAM interface and 133 MHz DDR interface
● Programmable flash memory interface
– 4 separately configurable banks, 8/16-bits wide
– SRAM, peripheral, flash, SFlash™ support
– Support for low cost DVB-CI
● Programmable transport interfaces (PTI)
– single transport stream input
– support for DVB transport streams
– integrated DVB, ICAM descramblers
● MPEG2 MP@ML video decoder
– Fully programmable horizontal and vertical SRCs
● Graphics/display
– 3 display planes
– 8 bpp CLUT graphics, 256 x 30 bits (AYCbCr) CLUT entries, 16 bpp true color
graphics, RGB565, ARGB1555, ARGB4444 formats. Link list control
– Alpha blending, antialiasing, antiflutter, antiflicker filters
– 2-D paced blitter engine with fill function
– Blitter based display compositor
– Digital video output: compliant with CCIR 601/CCIR 656.
● PAL/NTSC/SECAM encoder
– RGB, CVBS, Y/C and YUV outputs with four 10-bit DACs outputs. RGB/CVBS or
YUV/CVBS or YC/CVBS
– Encoding of CGMS, Teletext, WSS, VPS, closed caption
■ Audio subsystem
– MPEG-1 layers I/II decoding
– Simultaneous MPEG audio decode and output of Dolby streams on S/PDIF
– IEC958/IEC1937 digital audio output interface
– Integrated stereo audio DAC system
■ Central DMA controller
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