IRF840 Datasheet, PDF (3/8 Pages) Motorola, Inc – N-CHANNEL ENHANCEMENT-MODE SILICON GATE TMOS POWER FIELD EFFECT TRANSISTOR

IRF840
ELECTRICAL CHARACTERISTICS (continued)
SWITCHING ON
S ymb ol
td(on)
t_r
P a ra m et er
Turn-on Time
Rise Time
Qg
Total Gate Charge
Q_gs Gate-Source Charge
Qgd Gate-Drain Charge
Test Conditions
VDD = 250 V ID = 4.3 A
RG = 4.7 Ω
VGS = 10 V
(see test circuit, figure 3)
VDD = 400 V ID = 8.0 A VGS = 10 V
Min.
Typ .
19
11
39
10.6
13.7
Max.
50
Unit
ns
ns
nC
nC
nC
SWITCHING OFF
S ymb ol
t_{r(Vo f f)}
tf
t_c
P a ra m et er
Off-voltage Rise Time
Fall Time
Cross-over Time
Test Conditions
V_DD = 400 V I_D = 8 A
R_G = 4.7 Ω V_GS = 10 V
(see test circuit, figure 5)
Min.
Typ .
11.5
11
20
Max.
Unit
ns
ns
ns
SOURCE DRAIN DIODE
S ymb ol
P a ra m et er
Test Conditions
I_SD
I_SDM (•)
Source-drain Current
Source-drain Current
(pulsed)
VSD (∗) Forward On Voltage
ISD = 8.0 A VGS = 0
trr
Reverse Recovery
Time
Qrr
Reverse Recovery
I_SD = 8.0 A di/dt = 100 A/µs
VDD = 100 V Tj = 150 ^oC
(see test circuit, figure 5)
Charge
IRRM Reverse Recovery
Current
(∗) Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %
(•) Pulse width limited by safe operating area
Min.
Typ .
Max.
8.0
32
Unit
A
A
1.6
V
420
ns
3.5
µC
16.5
A
Safe Operating Area
Thermal Impedance
3/8