IRF520 Datasheet, PDF (3/9 Pages) STMicroelectronics – N - CHANNEL ENHANCEMENT MODE POWER MOS TRANSISTORS

ELECTRICAL CHARACTERISTICS (continued)
SWITCHING RESISTIVE LOAD
Symb ol
t_d(on)
t_r
t_d(off)
tf
Q_g
Q_gs
Qgd
Parameter
Turn-on Time
Rise Time
Turn-off Delay Time
Fall Time
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Test Conditions
V_DD = 50 V I_D = 5 A
R_GS = 4.7 Ω V_GS = 10 V
(see test circuit)
I_D = 10 A V_GS = 10 V
V_DD = Max Rating x 0.8
(see test circuit)
SOURCE DRAIN DIODE
Symb ol
Parameter
Test Conditions
IS D
I SDM(•)
Source-drain Current
Source-drain Current
(pulsed)
V_SD (∗) Forward On Voltage
I_SD = 10 A V_GS = 0
trr
Reverse Recovery
Time
Q_rr Reverse Recovery
Charge
ISD = 10 A
V_DD = 20 V
(∗) Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %
(•) Pulse width limited by safe operating area
di/dt = 100 A/µs
T_j = 150 ^oC
IRF520/FI
Min.
Typ.
10
50
25
20
15
7
4
Max.
15
75
40
30
25
Unit
ns
ns
ns
ns
nC
nC
nC
Min.
Typ.
Max.
10
40
Unit
A
A
1.6
V
80
ns
0. 22
µC
Safe Operating Area for TO-220
Safe Operating Area for ISOWATT220
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