M58WR128ET Datasheet, PDF (28/87 Pages) STMicroelectronics – 128 Mbit 8Mb x 16, Multiple Bank, Burst 1.8V Supply Flash Memory

M58WR128ET, M58WR128EB
Table 9. Configuration Register
Bit
Description
CR15
Read Select
CR14
CR13-CR11 X-Latency
CR10
CR9
CR8
Wait Polarity
Data Output
Configuration
Wait Configuration
CR7
Burst Type
CR6
CR5-CR4
CR3
Valid Clock Edge
Wrap Burst
CR2-CR0 Burst Length
Value
Description
0
Synchronous Read
1
Asynchronous Read (Default at power-on)
Reserved
010
2 clock latency
011
3 clock latency
100
4 clock latency
101
5 clock latency
111
Reserved (default)
Other configurations reserved
0
WAIT is active Low
1
WAIT is active high (default)
0
Data held for one clock cycle
1
Data held for two clock cycles (default)
0
WAIT is active during wait state
1
WAIT is active one data cycle before wait state (default)
0
Interleaved
1
Sequential (default)
0
Falling Clock edge
1
Rising Clock edge (default)
Reserved
0
Wrap
1
No Wrap (default)
001
4 words
010
8 words
011
16 words
111
Continuous (CR7 must be set to ‘1’) (default)
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