AN4471 Datasheet, PDF (27/39 Pages) STMicroelectronics – STEVAL-IME009V1 evaluation board based on the STHV800 high voltage pulser

AN4471
Connectors
Note:
This memory is mutually exclusive with the on-board Flash memory, disconnect J38 before
plugging an expansion memory over J10; relative LED (D29) turns on.
4.5
FPGA
FPGA USER I/O connector (J7) connector is used for debugging purposes; it allows the
user to directly interface with FPGA I/Os.
Pin number
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
Table 24. FPGA USER I/O connector pinout
Description
Pin number
Description
GND
2
CW
GND
GND
4
TRIGGER_OUT
6
CLKOUT
GND
8
CYCLE_END
GND
10
THSD_EN
GND
12
ERROR
GND
14
GND
16
PROG<0>
PROG<1>
GND
18
PROG<2>
GND
20
PROG<3>
GND
GND
22
IDLE_SEL<0>
24
IDLE_SEL<1>
GND
26
REMOTE_ENABLE
GND
28
REMOTE_START
GND
30
REMOTE_STOP
GND
32
REMOTE_RESET
Direction
OUTPUT
OUTPUT
OUTPUT
OUTPUT
OUTPUT
OUTPUT
IN/OUT
IN/OUT
IN/OUT
IN/OUT
IN/OUT
IN/OUT
INPUT
INPUT
INPUT
INPUT
Table 25. FPGA PMOD connectors (J8) not mounted on the board
Pin number
Description
Pin number
Description
1
Not used
2
3
Not used
4
5
GND
6
7
Not used
8
9
Not used
10
11
GND
12
Not used
Not used
3.3 V
Not used
Not used
3.3 V
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