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SPEAR-09-H022_06 Datasheet, PDF (25/71 Pages) STMicroelectronics – SPEAr Head200 ARM 926, 200K customizable eASIC gates, large IP portfolio SoC
SPEAR-09-H022
Table 1. Pin description by functional groups (continued)
Group
Signal Name
Ball Direction
Function
DMNS
W1
I/O D - port of USB device
DPLS
V1
I/O D + port of USB device
HOST1_DP
HOST1_DM
P1
I/O D - port of USB host1
N1
I/O D + port of USB host1
HOST2_DP
L1
I/O D - port of USB host2
HOST2_DM
K1
I/O D + port of USB host2
HOST1_VBUS
H2 Output USB host1 VBUS signal
HOST2_VBUS
H1 Output USB host2 VBUS signal
USBs OVERCURH1
G1
I/O USB host1 overcurrent
OVERCURH2
F1
I/O USB host2 overcurrent
VBUS
RREF
H3
I/O USB device VBUS signal
K5
Input USB reference resistor
Pin description
Pin Type
Analog buffer, 5 V
tolerant
TTL bidirectional
buffer,
3.3 V capable,
4 mA drive capability
TTL bidirectional
buffer,
3.3 V capable,
4 mA drive capability,
with Pull Down
TTL bidirectional
buffer,
3.3 V capable,
4 mA drive capability
TTL bidirectional
buffer,
3.3 V capable,
4 mA drive capability,
with Pull Down
Analog buffer,
3.3 V capable
Table 2. Pins belonging to POWER group
Group
Signal Name
Ball
vdde3v3
vdd
gnde
vdd2v5
thermal_gnd
Note (1)
Note (2)
Note (3)
Note (4)
Note (5)
POWER anavdd_3v3_adc
V22
anagnd_3v3_adc
U18
VREFP_adc
V21
VREFN_adc
T18
vdd_dith
W7
vss_dith
V7
Function
Digital 3.3 V power
Digital 1.2 V power
Digital ground
DDR / SDR digital 3.3 / 2.5V power
Thermal Pad
Dedicated ADC 3.3 V power
Dedicated ADC ground
ADC positive reference Voltage
ADC pegative reference Voltage
DDR / SDR dedicated digital PLL 3.3 V power
DRR / SDR dedicated digital PLL ground
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