PSD4235G2V_09 Datasheet, PDF (25/124 Pages) STMicroelectronics – Flash in-system programmable (ISP) peripherals for 16-bit MCUs (3.3 V supply)

PSD4235G2V
Register bit definition
5.5
Drive registers - Ports A, B, D, E, G
Table 10.
Bit 7
Port pin 7
Drive registers - Ports A, B, D, E, G
Bit 6
Bit 5
Bit 4
Bit 3
Port pin 6 Port pin 5 Port pin 4 Port pin 3
Bit 2
Port pin 2
Bit 1
Port pin 1
Bit 0
Port pin 0
Port pin <i>:
0: Port pin <i> is configured for CMOS output driver (default).
1: Port pin <i> is configured for Open Drain output driver.
5.6
Drive registers - Ports C and F
Table 11.
Bit 7
Port pin 7
Drive registers - Ports C, F
Bit 6
Bit 5
Bit 4
Port pin 6 Port pin 5 Port pin 4
Bit 3
Port pin 3
Bit 2
Port pin 2
Bit 1
Port pin 1
Bit 0
Port pin 0
Port pin <i>:
0: Port pin <i> is configured for CMOS output driver (default).
1: Port pin <i> is configured in Slew Rate mode.
5.7
Enable-Out registers - Ports A, B, C, F
Read-only registers
Table 12.
Bit 7
Port pin 7
Enable-Out registers - Ports A, B, C, F
Bit 6
Bit 5
Bit 4
Bit 3
Port pin 6 Port pin 5 Port pin 4 Port pin 3
Bit 2
Port pin 2
Bit 1
Port pin 1
Bit 0
Port pin 0
Port pin <i>:
0: Port pin <i> is in tri-state driver (default).
1: Port pin <i> is enabled.
5.8
Input macrocells registers- ports A, B, C
Read input macrocell (IMC7-IMC0) status on Ports A, B and C.
Read-only registers
Table 13. Input macrocell registers - Port A, B, C
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
IMcell 7 IMcell 6 IMcell 5 IMcell 4 IMcell 3
Bit 2
IMcell 2
Bit 1
IMcell 1
Bit 0
IMcell 0
25/124