STW4811M_10 Datasheet, PDF (23/85 Pages) STMicroelectronics – Power management for multimedia processors

STw4811M/STw4811N
Functional description
Register summary
Table 7. Register summary
Register Addr.
7
6
5
4
3
2
1
0
00h
1
0
0
0
0
0
1
1
Vendor ID
01h
0
0
0
0
0
1
0
0
02h
0
0
0
1
0
0
0
1
Product ID
03h
0
1
0
0
0
0
0
0
USB control
register 1
04h
05h
Not used uart_en
oe_int_en
bdis_
acon_en
not used
dat_se0
suspend speed
USB control
register 2
06h vbus_
07h chrg
vbus_ vbus_
dischrg drv
id_gnd
dn_
dp_
dn_
pulldown pulldown pullup
dp_
pullup
USB interrupt
source
08h cr_int
bdis_
acon
id_float dn_hi
id_gnd_
forced
dp_hi
sess_vld vbus_vld
USB interrupt
latch
0Ah
cr_int
0Bh
bdis_
acon
id_float dn_hi
id_gnd_
forced
dp_hi
sess_vld vbus_vld
USB interrupt
mask false
0Ch
cr_int
0Dh
bdis_
acon
id_float dn_hi
id_gnd_
forced
dp_hi
sess_vld vbus_vld
USB interrupt
mask true
0Eh
cr_int
0Fh
bdis_
acon
id_float dn_hi
id_gnd_
forced
dp_hi
sess_vld vbus_vld
USB EN
10h
Not used
B_sess_
end
Not used
th_
Bdevice
usb_en
not used
Configuration 1
11h
pdn_
vaux
it_warn
monitoring
_vio_
mmc_ls_
vmem_ status
vcore
vmmc_sel[2:0]
pdn_
vmmc
Configuration 2 20h not used
not used gpo2
gpo1
mask_it_ external_ mask_
wake_up vmmc twarn
Vcore_Sleep
21h not used
vcore_
available
vcore_sleep[3:0]
Table 8.
Addr.
1Fh
Addr.
1 Eh
Power control register
15
14
13
12
Not used
7
6
5
4
reg address 3 bits
11
10
3
2
data din/dout 4 bits
9
8
reg address 2 bits
1
0
ena write
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