STW4811M_10 Datasheet, PDF (21/85 Pages) STMicroelectronics – Power management for multimedia processors

STw4811M/STw4811N
Functional description
Table 3.
b7
Device ID
b6
AdrID6
AdrID5
b5
AdrID4
Table 4.
b7
Register address
b6
b5
RegADR7 RegADR6 RegADR5
Table 5.
b7
DATA7
Register data
b6
b5
DATA6
DATA5
b4
AdrID3
b4
RegADR4
b4
DATA4
b3
AdrID2
b3
RegADR3
b3
DATA3
b2
AdrID1
b2
RegADR2
b2
DATA2
b1
AdrID0
b1
RegADR1
b1
DATA1
b0
R/W
b0
RegADR0
b0
DATA0
I2C interface modes
Figure 7. Control interface: I2C format
WRITE
SINGLE BYTE
ACK
ACK
DEVICE ADDRESS REGn ADDRESS
REGn Data In
01011010
START
WRITE
MULTI BYTE
ACK
ACK
DEVICE ADDRESS REGn ADDRESS
REGn Data In
01011010
START
ACK
STOP
ACK
ACK
ACK
REGn+m Data In
m+1 data bytes
STOP
RANDOM ADDR
READ
SINGLE BYTE
ACK
ACK
DEVICE ADDRESS REGn ADDRESS
01011010
ACK
DEVICE ADDRESS REGn Data Out
01011011
START
START
NO ACK
RANDOM ADDR
READ
MULTI BYTE
ACK
ACK
DEVICE ADDRESS REGn ADDRESS
01011010
ACK
DEVICE ADDRESS
01011011
START
START
ACK
Reg n Data Out
ACK
NO ACK
Reg n + m Data Out
m+1 data bytes
STOP
Figure 8. Control interface: I2C timing
SDA
t_buf
USBSDA
t_{hd_sta}
t_f
t_r
t_{hd_dat}
t_{su_sta}
t_{su_dat}
t_{hd_sta}
SCL
USBSCL
t_low
t_high
Stop
Start
Start repeated
t_{su_sto}
Stop
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