L9658 Datasheet, PDF (23/64 Pages) STMicroelectronics – Analog output available for resistance

L9658
4.9.1
Functional description
The following power-up conditions is considered as normal operations. VRES input can be
connected to either a power supply output or an ignition voltage. VDD is connected to 5 V
output of power supply. When VRES is connected to the power supply, VDD voltage will
reach its regulation voltage before VRES voltage is stabilized. In this condition, the device
has the control o f its internal logic and that prevent an inadvertent turn-on of the drivers.
When VRES is connected to the ignition, VRES voltage will be stabilized before VDD
reaches its regulation voltage. In this condition, all drivers are inactive. A pull-down on the
gates of high side drivers (SQH) is provided to prevent these drivers from momentarily
turning-on. Any loop driver fault conditions do not turn on the SQH and SQL drivers. Only a
valid deployment condition can turn on the respective SQH and SQL drivers. Refer to
section for valid deployment conditions.
Arming interface
The arming interface is used as a fail-safe to prevent inadvertent airbag deployment. Along
with deployment command, these signals provide redundancy. Pulse stretch timer is
provided for each channel/loop. Either ARM signal or deployment command shall start the
pulse stretch timer.
Arming interface has a dedicated 8-bit SPI interface.
When CS_A is negated, L9658 latch ARM signal from the shift register and start the pulse
stretch timer for the respective channel/s. The device can deploy a channel, ONLY when
DEPEN is asserted and any of the following conditions are satisfied:
– the respective deployment command is sent during a valid pulse stretch timer,
which initiated by ARM signal
– the respective SPI ARM command is sent during a valid pulse stretch timer, which
initiate by deployment command
During a deployment, the device turn on the respective high side (SQH) and low side (SQL)
drivers for duration of t_DEPLOY. When a deployment is initiated, it cant be terminated, except
during a reset event.
Figure 11. Deployment sequence
CS_A ^A
B
AA
B
A
B
AB
AB
Pulse Stretch Timer
ARM Status Flag
CS _D
t_PULSE
t<t_PULSE
t_PULSE
t_PULSE
13
13
21 1
t<t_PULSE
t_PULSE
t < t_PULSE
t<t_PULSE
11
21 3
Deploy
t_DEPLOY
t_DEPLOY
SPI Deploy Command
Status Flag
Deploy Success Flag
Deploy Status Flag
Monitor Mode Command bit
D8 = 0
Deploy Status Flag
Monitor Mode Command bit
D8 = 1
SPI CS_D Notes:
Valid
Deployment
Window
1: Deployment-enable Command 2: Clear Deploy Success Flag
DEPEN input is assumed to be active in this sequence.
Valid
Deployment
Window
3: Deployment-disable Command
ARMEN Notes:
A: Arming-enable Command
Valid
Deployment
Window
B: Arming-disable Command
Valid
Deployment
Window
When a deployment-enable command is sent through SPI, the pulse stretcher shall be
initiated immediately following the falling edge of CS_D. When another deployment-enable
Doc ID 14219 Rev 3
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