STA015_04 Datasheet, PDF (21/55 Pages) STMicroelectronics – MPEG 2.5 LAYER III AUDIO DECODER WITH ADPCM CAPABILITY

STA015 STA015B STA015T
SOFT_RESET
Address: 0x10 (16)
Type: WO
Software Reset: 0x00
Hardware Reset: 0x00
MSB
LSB
b7
b6
b5
b4
b3
b2
b1
b0
X
X
X
X
X
X
X
0
1
X = don’t care; 0 = normal operation; 1 = reset
When this register is written, a soft reset occours. The STA015 core command register and the interrupt
register are cleared. The decoder goes in to idle mode.
PLAY
Address: 0x13 (19)
Type: R/W
Software Reset: 0x01
Hardware Reset: 0x01
MSB
LSB
b7
b6
b5
b4
b3
b2
b1
b0
X
X
X
X
X
X
X
0
1
X = don’t care; 0 = normal operation; 1 = play
The PLAY command is handled according to the state of the decoder, as described in section 2.5. PLAY
only becomes active when the decoder is in DECODE mode.
MUTE
Address: 0x14
Type: R/W
Software Reset: 0x00
Hardware Reset: 0x00
MSB
LSB
b7
b6
b5
b4
b3
b2
b1
b0
X
X
X
X
X
X
X
0
1
X = don’t care; 0 = normal operation; 1 = mute The MUTE command is handled according to the state of
the decoder, as described in section 2.5. MUTE sets the clock running.
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