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M24C16-RBN6P Datasheet, PDF (21/38 Pages) STMicroelectronics – 16 Kbit, 8 Kbit, 4 Kbit, 2 Kbit and 1 Kbit serial I²C bus EEPROM
M24C16, M24C08, M24C04, M24C02, M24C01
DC and AC parameters
Table 9. DC characteristics (M24Cxx-W, device grade 6)
Symbol
Parameter
Test conditions (in addition to those in
Table 6)
Min.
Max. Unit
ILI
Input leakage current
(SCL, SDA, E0, E1,and
E2)
VIN
=
VSS
or
VCC,
device
in
Standby
mode
-
± 2 µA
ILO Output leakage current
ICC Supply current
ICC1 Standby supply current
VIL
Input low voltage (SDA,
SCL, WC)
SDA in Hi-Z, external voltage applied on
SDA: VSS or VCC
-
VCC = 5 V, fc = 400 kHz
(rise/fall time < 50 ns)
-
VCC = 2.5 V, fc = 400 kHz
(rise/fall time < 50 ns)
-
Device not selected(1), VIN = VSS or VCC,
for 2.5 V < VCC ≤ 5.5 V
-
± 2 µA
2 mA
1 mA
1 µA
–0.45 0.3VCC V
VIH
Input high voltage (SDA,
SCL, WC)
0.7VCC VCC+1 V
VOL Output low voltage
IOL = 2.1 mA when VCC = 2.5 V or
IOL = 3 mA when VCC = 5.5 V
-
0.4 V
1. The device is not selected after a power-up, after a read command (after the Stop condition), or after the
completion of the internal write cycle tW (tW is triggered by the correct decoding of a write command).
Table 10. DC characteristics (M24Cxx-W, device grade 3)
Symbol
Parameter
Test condition
(in addition to those in Table 6)
Min.
Max. Unit
ILI
Input leakage current (SCL,
SDA, E0, E1,and E2)
VIN = VSS or VCC, device in
Standby mode
-
± 2 µA
ILO Output leakage current
ICC Supply current
ICC1 Standby supply current
VIL
Input low voltage (SDA,
SCL, WC)
SDA in Hi-Z, external voltage
applied on SDA: VSS or VCC
-
VCC = 5 V, fC= 400 kHz
(rise/fall time < 50 ns)
-
VCC = 2.5 V, fC = 400 kHz
(rise/fall time < 50 ns)
-
Device not selected(1), VIN = VSS
or VCC, VCC = 5 V
-
Device not selected(1), VIN = VSS
or VCC, VCC = 2.5 V
-
± 2 µA
3 mA
3 mA
5
µA
2
µA
–0.45 0.3VCC V
VIH
Input high voltage (SDA,
SCL, WC)
0.7VCC VCC+1 V
VOL Output low voltage
IOL = 2.1 mA when VCC = 2.5 V or
IOL = 3 mA when VCC = 5.5 V
-
0.4 V
1. The device is not selected after a power-up, after a read command (after the Stop condition), or after the
completion of the internal write cycle tW (tW is triggered by the correct decoding of a write command).
Doc ID 5067 Rev 17
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