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HCC4031B Datasheet, PDF (2/12 Pages) STMicroelectronics – 64-STAGE STATIC SHIFT REGISTER
HCC/HCF4031B
ister packages while allowing reduced clock drive
fan-out and transition-time requirements. A third
cascading option makes use of the Q’ output from
the 1/2 stage, which is available on the next nega-
tive-going transition of the clock after the Q output
occurs. This delayed output, like the delayed clock
CLD, is used with clocks having slow rise and fall
times.
FUNCTIONAL DIAGRAM
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
Value
Unit
V DD* Supply Voltage : HC C Types
H C F Types
– 0.5 to + 20
V
– 0.5 to + 18
V
VI Input Voltage
II
DC Input Current (any one input)
– 0.5 to VDD + 0.5
V
± 10
mA
Pt o t Total Power Dissipation (per package)
Dissipation per Output Transistor
for To p = Full Package-temperature Range
T o p Operating Temperature : HCC Types
H CF Types
200
mW
100
mW
– 55 to + 125
°C
– 40 to + 85
°C
Ts tg Storage Temperature
– 65 to + 150
°C
Stresses above those listed under ”Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and
functional operation of the device at theseor any other conditions abovethose indicated in the operational sections of this specification is not implied.
Exposure to absolute maximum rating conditions for external periods may affect device reliability.
* All voltage values are referred to VSS pin voltage.
RECOMMENDED OPERATING CONDITIONS
Symbol
VDD
VI
Top
Parameter
Supply Voltage : HCC Types
HC F Types
Input Voltage
Operating Temperature : H CC Types
H C F Types
V al u e
3 to + 18
3 to + 15
0 to VDD
– 55 to + 125
– 40 to + 85
Unit
V
V
V
°C
°C
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