TDA7513T Datasheet, PDF (19/59 Pages) STMicroelectronics – SINGLE-CHIP FM/AM TUNER WITH STEREO DECODER AND AUDIO PROCESSOR

TDA7513T
5.2 AM Section
The upconversion mixer1 is combined with a gain control circuit 1 sensing three input signals: ultra-narrow
band information (from the IF2 amplifier input - pin #AMIF2AMPIN), narrow-band information (from the
mixer2 input - pin #AMMIX2IN) and wide band information (from the mixer1 input - pins #AMMIX1IN+ and
#AMMIX1IN-). This gain control circuit generates two output signals: a current for P-I-N diode attenuation
and a voltage for the external preamplifier cascode upper base. It is possible to put in a separate narrow
bandpass filter before mixer2 at PIN 58. The intervention point for first AGC on all three bands is program-
mable by software.
The oscillator frequency for mixer1 is generated by dividing the FM VCO frequency (AMD) by 6, 8 and 10
(6 for Japan applications, 8 for Eastern European applications, 10 for Western European and North Amer-
ican operation).
In mixer2 the IF1 is downconverted into the 450kHz IF2. The gain of mixer2 is reduced by the 2nd AGC
after the gain of the subsequent IF2 amplifier has been reduced by 30dB. The mixer2 tank center frequen-
cy is software-adjustable (IF2T).
After channel selection is done by the ceramic filter, a 450kHz amplifier with a gain control is included. The
gain is controlled by the AGC2 loop over a 30dB range; the full gain with no AGC applied is programmable.
The AM demodulation is made by multiplication of the IF2 amplifier output by the amplified and limited sig-
nal coming from the IF2 amplifier input, thus making the demodulation process inherently linear.
The demodulated audio signal is low-passed by the capacitor at pin #AMAGC2TC to produce the DC
AGC2 voltage. The low-pass time constant is switchable by a ratio of 30 in order to reduce the settling
time of the AGC2 in 'seek' mode (AMSEEK).
The FM 450kHz limiter is used to generate the square wave needed by the AM demodulator, a field-
strength indication and to feed the AM IF counter. The fieldstrength information is generated mainly from
the narrow-band signal at the input of the IF2 amplifier; since the dynamic range at that input is limited by
the AGC2 action, a fieldstrength extension is made adding the contribution of the signal at the input of
mixer2. Since the bandwidth there is very large, though, the latter contribution is enabled only if the
strength of the narrow-band signal is higher than an internally defined threshold. The fieldstrength signal
must be low-passed to remove audio content and this is done by use of the capacitor at pin #SMETERTC
with an I²C bus programmable internal resistor. The value of the capacitor is determined for correct FM
operation; the value of the internal resistor for AM is selectable in order to make the AM time constant
suitable for AM operation.
A station detection function is provided for easy seek stop operation. The fieldstrength signal is compared
with a programmable threshold and the result (logic '1' if the current station strength is higher than the
threshold) is combined by an AND gate with the IF counter output (logic '1' if the current channel is cen-
tered within a programmable window around the desired frequency). The result is available on pin #SD for
direct connection to the microprocessor.
5.3 PLL and IF Counter Section
The IC contains a frequency synthesizer and a loop filter for the radio tuning system. Only one VCO is
required to build a complete PLL system for FM and AM upconversion. For auto search stop operation an
IF counter system is available.
5.3.1 PLL Frequency Synthesizer Block
The counter works in a two stages configuration. The first stage is a swallow counter with a two-modulus
(32/33) precounter. The second stage is an 11-bit programmable counter. The circuit receives the scaling
factors for the programmable counters and the values of the reference frequency via I²C bus. The refer-
ence frequency is generated by an adjustable internal (XTAL) oscillator followed by the reference divider.
The reference and step-frequencies are independently selectable (RC, PC). The phase-frequency detec-
tor outputs switches the programmable current source. The loop filter integrates the latter to a DC voltage.
The current source values is programmable with 6 bits received via I2C bus (A, B, CURRH, LPF). To min-
imize the noise induced by the digital part of the system, a special guard area is implemented. The loop
gain can be adjusted for different conditions by setting the current values of the chargepump generator.
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