STM32F415XX Datasheet, PDF (180/186 Pages) STMicroelectronics – ARM Cortex-M4 32b MCU+FPU, 210DMIPS, up to 1MB Flash/192+4KB RAM

Revision history
STM32F415xx, STM32F417xx
Date
31-May-2012
Table 98. Document revision history (continued)
Revision
Changes
Updated Figure 5: STM32F41x block diagram and Figure 7: Power
supply supervisor interconnection with internal reset OFF
Added SDIO, added notes related to FSMC and SPI/I2S in Table 2:
STM32F415xx and STM32F417xx: features and peripheral counts.
Starting from Silicon revision Z, USB OTG full-speed interface is now
available for all STM32F415xx devices.
Added full information on WLCSP90 package together with
corresponding part numbers.
Changed number of AHB buses to 3.
Modified available Flash memory sizes in Section 2.2.4: Embedded
Flash memory.
Modified number of maskable interrupt channels in Section 2.2.10:
Nested vectored interrupt controller (NVIC).
Updated case of Regulator ON/internal reset ON, Regulator
ON/internal reset OFF, and Regulator OFF/internal reset ON in
Section 2.2.16: Voltage regulator.
Updated standby mode description in Section 2.2.19: Low-power
modes.
Added Note 1 below Figure 16: STM32F41x UFBGA176 ballout.
Added Note 1 below Figure 17: STM32F41x WLCSP90 ballout.
Updated Table 7: STM32F41x pin and ball definitions.
3
Added Table 8: FSMC pin definition.
Removed OTG_HS_INTN alternate function in Table 7: STM32F41x
pin and ball definitions and Table 9: Alternate function mapping.
Removed I2S2_WS on PB6/AF5 in Table 9: Alternate function
mapping.
Replaced JTRST by NJTRST, removed ETH_RMII _TX_CLK, and
modified I2S3ext_SD on PC11 in Table 9: Alternate function mapping.
Added Table 10: STM32F41x register boundary addresses.
Updated Figure 18: STM32F41x memory map.
Updated V_DDA and V_REF+ decoupling capacitor in Figure 21: Power
supply scheme.
Added power dissipation maximum value for WLCSP90 in Table 14:
General operating conditions.
Updated V_POR/PDR in Table 19: Embedded reset and power control
block characteristics.
Updated notes in Table 21: Typical and maximum current consumption
in Run mode, code with data processing running from Flash memory
(ART accelerator disabled), Table 20: Typical and maximum current
consumption in Run mode, code with data processing running from
Flash memory (ART accelerator enabled) or RAM, and Table 22:
Typical and maximum current consumption in Sleep mode.
Updated maximum current consumption at T_A = 25 °n Table 23:
Typical and maximum current consumptions in Stop mode.
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