ST72321XX Datasheet, PDF (178/243 Pages) STMicroelectronics – PLL for 2x frequency multiplication

Instruction set
ST72321xx-Auto
18.1.1
Table 97. CPU addressing mode overview (continued)
Mode
Syntax
Pointer
Destination address
(Hex.)
Long
Indirect Indexed ld A,([$10.w],X) 0000..FFFF 00..FF
Relative Direct
jrne loop
PC+/-127
Relative
Bit
Indirect
Direct
jrne [$10]
bset $10,#7
PC+/-127
00..FF
00..FF
Bit
Indirect
bset [$10],#7 00..FF
00..FF
Bit
Direct Relative btjt $10,#7,skip 00..FF
Bit
Indirect Relative btjt [$10],#7,skip 00..FF
00..FF
Pointer
size
(Hex.)
word
byte
byte
byte
Length
(bytes)
+2
+1
+2
+1
+2
+2
+3
Inherent
All Inherent instructions consist of a single byte. The opcode fully specifies all the required
information for the CPU to process the operation.
Table 98. Inherent instructions
Instruction
NOP
TRAP
WFI
HALT
RET
IRET
SIM
RIM
SCF
RCF
RSP
LD
CLR
PUSH/POP
INC/DEC
TNZ
CPL, NEG
MUL
SLL, SRL, SRA, RLC, RRC
SWAP
Function
No operation
S/W Interrupt
Wait For Interrupt (Low Power Mode)
Halt Oscillator (Lowest Power Mode)
Sub-routine Return
Interrupt Sub-routine Return
Set Interrupt Mask (level 3)
Reset Interrupt Mask (level 0)
Set Carry Flag
Reset Carry Flag
Reset Stack Pointer
Load
Clear
Push/Pop to/from the stack
Increment/Decrement
Test Negative or Zero
1 or 2 Complement
Byte Multiplication
Shift and Rotate Operations
Swap Nibbles
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Doc ID 13829 Rev 1