M24C02-DRE Datasheet, PDF (17/41 Pages) STMicroelectronics – 2-Kbit serial IC bus EEPROM - 105C operation

M24C02-DRE
Instructions
4.1.2
Note:
Page Write
The Page Write mode allows up to N⁽¹⁾ bytes to be written in a single Write cycle, provided
that they are all located in the same page in the memory: that is, the most significant
memory address bits, A7/A4, are the same. If more bytes are sent than will fit up to the end
of the page, a condition known as “roll-over” occurs. In case of roll-over, the first bytes of the
page are overwritten.
The bus master sends from 1 to N⁽¹⁾ bytes of data, each of which is acknowledged by the
device if Write Control (WC) is low. If Write Control (WC) is high, the contents of the
addressed memory location are not modified, and each data byte received by the device is
not acknowledged, as shown in Figure 6. After each byte is transferred, the internal byte
address counter is incremented. The transfer is terminated by the bus master generating a
Stop condition.
Figure 6. Write mode sequences with WC = 1 (data write inhibited)
7#
"YTE7RITE
!#+
!#+
./!#+
$EVSELECT
"YTEADDRESS
$ATAIN
27
7#
0AGE7RITE
!#+
!#+
./!#+
./!#+
$EVSELECT
"YTEADDRESS
$ATAIN
$ATAIN
$ATAIN
27
7#CONTgD
0AGE7RITE
CONTgD
./!#+
./!#+
$ATAIN.
1. N is the number of bytes in a page.
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!)D
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