AN3023 Datasheet, PDF (17/23 Pages) STMicroelectronics – Using the analog-to-digital converter of the STM8A microcontroller

AN3023
Configuring ADC registers for conversion
3.2
Storing converted values
In the scan mode and buffered continuous mode, the converted ADC values are stored in
the data buffer registers ADC_DBxRH and ADC_DBxRL, where x = 1..15.
In the normal mode, the converted ADC values are stored in the ADC data registers
ADC_DRH and ADC_DRL. ADC_DRH and ADC_DRL also contain the last converted value
in scan and buffered continuous mode.
Different data alignment modes (left or right) can be selected depending on the application.
If right alignment mode is chosen, the LSB register (ADC_DRL) must be read before the
MSB register (ADC_DRH), otherwise the values of register ADC_DRH are not updated. If
left alignment mode is chosen, the MSB register (ADC_DRH) must be read before the LSB
register (ADC_DRL), otherwise the values of register ADC_DRL are not updated. This
prevents reading data register values from two different conversions. Therefore the reading
order must be respected.
Practical use
Left alignment is useful for fast read access to the conversion result in 8-bit resolution.
Right alignment is useful for fast read access when measuring low level signals. In cases
where the result does not affect the high order bits, you can read only the LSB byte.
3.3
ADC interrupt management
ADC interrupt sources are selectable from one or more of the following events:
● End of conversion (EOC) in nonbuffered mode—generated after each AD conversion
● End of conversion (EOC) in buffered mode—generated after data buffer registers are
full
● Analog watchdog alert—when converted values reach the high or low threshold values
You can enable the ADC interrupt to give the main program fast asynchronous event
notification at the end of conversion(s). This means the main program does not need to poll
the ADC conversion status flags but only has to process the ADC data results (for example,
after storing a set of conversions in a buffer). The reception of the ADC converted data
values is performed by an interrupt routine in the background. In addition, the analog
watchdog interrupt can be used for monitoring a given analog range on the measured
channels.
Register settings:
ADC_CSR: AWDIE, EOCIE bits
Doc ID 16113 Rev 1
17/23