ST7LITE3XF2 Datasheet, PDF (169/173 Pages) STMicroelectronics – 8-bit MCU with single voltage Flash, data EEPROM, ADC, timers, SPI, LINSCI™

ST7LITE3xF2
16 KNOWN LIMITATIONS
16.1 CLEARING ACTIVE INTERRUPTS
OUTSIDE INTERRUPT ROUTINE
When an active interrupt request occurs at the
same time as the related flag or interrupt mask is
being cleared, the CC register may be corrupted.
Concurrent interrupt context
The symptom does not occur when the interrupts
are handled normally, i.e. when:
– The interrupt request is cleared (flag reset or in-
terrupt mask) within its own interrupt routine
– The interrupt request is cleared (flag reset or in-
terrupt mask) within any interrupt routine
– The interrupt request is cleared (flag reset or in-
terrupt mask) in any part of the code while this in-
terrupt is disabled
If these conditions are not met, the symptom can
be avoided by implementing the following se-
quence:
Perform SIM and RIM operation before and after
resetting an active interrupt request
Ex:
SIM
reset flag or interrupt mask
RIM
16.2 LINSCI LIMITATION
16.2.1 Header Time-out does not prevent wake-
up from mute Mode
Normally, when LINSCI is configured in LIN slave
mode, if a header time-out occurs during a LIN
header reception (i.e. header length > 57 bits), the
LIN Header Error bit (LHE) is set, an interrupt oc-
curs to inform the application but the LINSCI
should stay in mute mode, waiting for the next
header reception.
Problem Description
The LINSCI sampling period is Tbit / 16. If a LIN
Header time-out occurs between the 9th and the
15th sample of the Identifier Field Stop Bit (refer to
Figure 109), the LINSCI wakes up from mute
mode. Nevertheless, LHE is set and LIN Header
Detection Flag (LHDF) is kept cleared.
In addition, if LHE is reset by software before this
15th sample (by accessing the SCISR register and
reading the SCIDR register in the LINSCI interrupt
routine), the LINSCI will generate another LINSCI
interrupt (due to the RDRF flag setting).
Figure 109. Header Reception Event Sequence
LIN Synch LIN Synch Identifier
Break
Field
Field
T_HEADER
ID field STOP bit
Critical
Window
Active mode is set
(RWU is cleared)
RDRF flag is set
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