STDVE001A Datasheet, PDF (16/49 Pages) STMicroelectronics – Adaptive single 3.4 Gbps TMDS/HDMI signal equalizer

Functional description
STDVE001A
3.3
HPD pins
The input pin HPD_INT is 5 V tolerant, allowing direct connection tp 5 V signals. The output
HPD pin has open-drain structure so that the disabled HPD output is driven to GND
whereas the enabled HPD port has the same polarity as the HPD_INT. Note that the HPD
output should have an external pull-up resistor connected to +5 V from the HDMI source.
3.4
DDC channels
The DDC channels are designed together with a bi-directional buffer so as to ensure the
voltage levels on the I²C lines are met even after long capacitive cables. This feature
eliminates the errors during EDID and HDCP reading.
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