M34F04 Datasheet, PDF (15/20 Pages) STMicroelectronics – 4Kbit Serial I2C Bus EEPROM With Hardware Write Control on Top Half of Memory

M34F04
Table 8. DC Characteristics
Symbol
Parameter
I_LI
Input Leakage Current
(SCL, SDA)
I_LO Output Leakage Current
I_CC Supply Current
I_CC1 Stand-by Supply Current
V_IL
Input Low Voltage
(E2, E1, SCL, SDA)
V_IH
Input High Voltage
(E2, E1, SCL, SDA, WC)
VOL Output Low Voltage
Test Condition
(in addition to those in Table 5)
Min.
V_IN = V_SS or V_CC
V_OUT = V_SS or V_CC, SDA in Hi-Z
V_CC =2.5V, f_c=400kHz (rise/fall time < 30ns)
V_IN = V_SS or V_CC , V_CC = 2.5 V
–0.3
Max. Unit
± 2 µA
± 2 µA
1
mA
0.5
µA
0.3V_CC V
IOL = 2.1 mA, VCC = 2.5 V
0.7V_CC V_CC+1 V
0.4
V
Table 9. AC Characteristics
Test conditions specified in Table 6 and Table 5
Symbol
Alt.
Parameter
Min.
Max.
Unit
f_C
f_SCL Clock Frequency
400
kHz
t_CHCL
t_HIGH Clock Pulse Width High
600
ns
t_CLCH
t_LOW Clock Pulse Width Low
1300
ns
t_DL1DL2 ²
t_F
SDA Fall Time
20
300
ns
t_DXCX
t_SU:DAT Data In Set Up Time
100
ns
t_CLDX
t_HD:DAT Data In Hold Time
0
ns
tCLQX
tDH
Data Out Hold Time
200
ns
t_CLQV ³
tAA
Clock Low to Next Data Valid (Access Time)
200
900
ns
tCHDX ¹
t_SU:STA Start Condition Set Up Time
600
ns
t_DLCL
t_HD:STA Start Condition Hold Time
600
ns
tCHDH
tSU:STO Stop Condition Set Up Time
600
ns
t_DHDL
t_BUF Time between Stop Condition and Next Start Condition
1300
ns
t_W
t_WR
Write Time
5
ms
Note: 1. For a reSTART condition, or following a Write cycle.
2. Sampled only, not 100% tested.
3. To avoid spurious START and STOP conditions, a minimum delay is placed between SCL=1 and the falling or rising edge of SDA.
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