VNL5090N3TR-E Datasheet, PDF (14/28 Pages) STMicroelectronics – OMNIFET III fully protected low-side driver

Application information
VNL5090N3-E, VNL5090S5-E
3.1
MCU I/O protection
ST suggests to insert a resistor (R_prot) in line to prevent the microcontroller I/O pins from
latching up^(a). The value of these resistors is a compromise between the leakage current of
microcontroller and the current required by the LSD I/Os (input levels compatibility) with the
latch-up limit of microcontroller I/Os:
Equation 1
I^--_l^--_a^---0_t^--_c^-.--7_h^---_u^---_p^{-- ≤ Rprot ≤ -(--V----O-----H}I^--_I^-_H^-μ---C-_m^----–_a^---_x^{--V----I--H----)}
Let:
• I_latchup > 20 mA
• V_OHµC > 4.5 V
• 35 Ω ≤ R_prot ≤ 100 KΩ
Then, the recommended value is R_prot = 1 KΩ
Figure 9 shows the turn-off current drawn during the demagnetization.
14/28
a. In case of negative transient on the drain pin.
DocID022568 Rev 6