VNL5030J-E Datasheet, PDF (14/28 Pages) STMicroelectronics – fully protected low-side driver

Application information
3
Application information
VNL5030J-E/ VNL5030S5-E
Figure 14. Application schematic
9
5SURW
5SURW
9
5VXSSO\
N
96833/<
,1387
67$786
9FF
5/
'5$,1
6285&(
'!0'#&4
3.1
MCU I/O protection
ST suggests to insert a resistor (R_prot) in line to prevent the microcontroller I/O pins from
latching up^(a). The value of these resistors is a compromise between the leakage current of
microcontroller and the current required by the LSD I/Os (input levels compatibility) with the
latch-up limit of microcontroller I/Os:
Equation 1
I^--_l^--_a^---0_t^--_c^-.--7_h^---_u^---_p^{-- ≤ Rprot ≤ -(--V----O----}I^-H-_I^--_H^-μ---C-_m^----–-_a^---_x^{-V----I--H----)}
Let:
• I_latchup > 20 mA
• V_OHµC > 4.5 V
• 35 Ω ≤ R_prot ≤ 100 KΩ
14/28
a. In case of negative transient on the drain pin.
DocID022767 Rev 6