STV5248 Datasheet, PDF (13/30 Pages) STMicroelectronics – MONOCHIP TELETEXT AND VPS DECODER WITH 8 INTEGRATED PAGES

STV5348 - STV5348/H - STV5348/T
Table 12. Registers Functions
Register
Function
Bit(s)
Description
SEL 11B (D0)
Selection of register 11B (D0 = 1) or 11A (D0 = 0)
EVEN OFF (D2)
Control of ODD/EVEN pin: EVEN signal output
(D2 = 0) or grounded (D2 = 1)
R0
Address
00H
R11 addressing and
pin functions control
DISABLE ROLLING
HEADER
FREE RUNNING
PLL (D6)
D4 = 1, Disable rolling header
D4 = 0, Normal operation
D6 = 0, PLL locks on line frequency
D6 = 1, to force free running mode
X/24 POSITION (D7) D7 = 0, packet X/24 stored to chapter 4 to 7/row 20
D7 = 1, packet X/24 stored to chapter 0 to 3/row 24
T1 (D1)
0
0
1
1
T0 (D0)
0
1
0
1
Character display line control:
312.5/312.5 line MIX - mode with interlace
312/313 line TEXT - mode without interlace
312/312 line Terminal mode without interlace
External synchronization. SCS mode (scan field
synchro)
R1
Address
01H
Operating mode
controls
TCS ON (D2)
DEW / FULLFIELD
(D3)
Master Mode (MA/SL Pin 2 = 0)
case POL Pin 4 = 0
D2 = 0, Pin 5 = VCS
D2 = 1, Pin 5 = TCS
Slave Mode (MA/SL Pin 2 = V_DD)
No effect
Selection of field flyback mode or full channel mode
(D3 = 1) for recovering of Teletext data.
GHOST ROW
ENABLE (D4)
Selection of ghost row mode (D4 = 1)
ACQUISITION
ON / OFF (D5)
Control of acquisition operation (D5 = 0 enables
acquisition)
7 bits + parity or 8 bits Selection of received data format either 7 bits with
without parity (D6) parity (D6 = 0) or 8 bits without parity (D6 = 1).
SC0, SC1, SC2
(D0, D1, D2)
Address the first column of the on chip page request
RAM to be written.
R2
Address
02H
Addressing
information for
a page request
TB (D3)
A0, A1 (D4, D5)
Test bit equal to "0" in the normal working mode.
Address a group of four consecutive pages currently
used for data acquisition.
A2 (D6)
Address of one of the two groups of four pages for
acquisition in normal mode.
R3
Address
03H
Data relative to the
requested page
(see Table 10)
PRD0 - PRD4
(D0 - D4)
Written data in the page request RAM, starting with
the columns addressed by SC0, SC1, SC2.
R4
Address
04H
Selection of one of
eight pages to
display
A0, A1, A2
(D0, D1, D2)
Chapter selection.
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