STV5248 Datasheet, PDF (1/30 Pages) STMicroelectronics – MONOCHIP TELETEXT AND VPS DECODER WITH 8 INTEGRATED PAGES

STV5348
STV5348/H - STV5348/T
MONOCHIP TELETEXT AND VPS DECODER
WITH 8 INTEGRATED PAGES
FEATURES SUMMARY
■ COMPLETE TELETEXT AND VPS DECODER
INCLUDING AN 8 PAGE MEMORY ON A
SINGLE CHIP
■ UPWARD SOFTWARE COMPATIBLE WITH
PREVIOUS ST’s MULTICHIP SOLUTIONS
(SAA5231, SDA5243, STV5345)
■ PERFORM PDC SYSTEM A (VPS) AND PDC
SYSTEM B (8/30/2) DATA STORAGE
SEPARATELY
■ DEDICATED "ERROR FREE" OUTPUT FOR
VALID PDC DATA
■ INDICATION OF LINE 23 FOR EXTERNAL
USE
■ SINGLE +5V SUPPLY VOLTAGE
■ SINGLE 13.875MHz CRYSTAL
■ REDUCED SET OF EXTERNAL
COMPONENTS, NO EXTERNAL
ADJUSTMENT
■ OPTIMIZED NUMBER OF DIGITAL SIGNALS
REDUCING EMC RADIATION
■ HIGH DENSITY CMOS TECHNOLOGY
■ DIGITAL DATA SLICER AND DISPLAY
CLOCK PHASE LOCK LOOP
■ 28 PIN DIP & SO PACKAGE
DESCRIPTION
The STV5348 decoder is a computer-controlled
teletext device including an 8 page internal mem-
ory. Data slicing and capturing extracts the teletext
information embedded in the composite video sig-
nal. Control is accomplished via a two wire serial
I²C bus ®. Chip address is 22h. Internal ROM pro-
vides a character set suitable to display text using
up to seven national languages. Hardware and
software features allow selectable master/slave
synchronization configurations. The STV5348
also supports facilities for reception and display of
current level protocol data.
Figure 1. Package
PDIP28 (Plastic Package)
SO28 (Plastic Package)
Figure 2. Pin Connections
CVBS 1
MA/SL 2
V_DDA
3
POL
4
STTV/LFB
5
FFB
6
V_SSD
7
R
8
G
9
B
10
RGB REF
11
BLAN
12
COR
13
ODD/EVEN
14
28 CBLK
27 TEST
26
V_SSA
25
V_SSO
24 XTI
23 XTO
22
V_DDD
21 VCR/TV
20 RESERVED
19 DV
18 L23
17 SDA
16 _SCL
15 Y
May 2004
REV. 2
1/30