AN2846 Datasheet, PDF (13/35 Pages) STMicroelectronics – The serial current limited termination device

AN2846
Application guidelines
Figure 17. Regulator output voltage
5.1 ^{Vdd (V)}
5.0
4.9
4.8
4.7
V_dd versus I_dd
V_dd -3%
4.6
4.5
9.0
I_dd (mA)
Figure 18 shows the schematic diagram of a solution for applications where greater current
is needed. The bypass transistor allows extra current while maintaining a 5 V regulated
voltage (see Figure 19).
Figure 18. V_DD booster schematic
V_CC
SMAJ30A
R_{E 2N2907A}
R_C
V_DD
I_RC
V_C
V_CS
SCLT3
IN₁
IN₂
R_REF
IN₃
LED₁
IN₄
LED₂
LED₃
Figure 19. Load regulation with V_DD booster
I_DD
V_DD
V_DD (V)
5.100
5.050
5.000
4.950
4.900
4.850
4.800
0.00
5.00
V_DD
10.00
15.00
I_DD (mA)
20.00
25.00
The proposed circuit allows a 25 mA current load capability with a V_DD regulation <2%. An
additional input protection device, like SMAJ30A, is needed to comply with voltage surges
because R_C has to be reduced to limit the voltage drop across it.
The dissipated power in the bypass transistor PZT2N2907A is 550 mW.
Components used:
● PZT2N2907A (SOT223 with 1 cm² copper area)
● R_C = 330 Ω (1/8 W), R_E = 51 Ω (1/8 W)
1.4
SPI functional description
Three registers (refer to Figure 1) are used to transfer input data and control data to the
16-bit data frame. The data frames are transmitted through four interface signals: /CS, SCK,
MOSI, and MISO.
Doc ID 15130 Rev 1
13/35