STW82103B Datasheet, PDF (12/67 Pages) STMicroelectronics – RF down converter with embedded integer-N synthesizer

Operating conditions
4
Operating conditions
STW82103B
Table 4. Operating conditions
Symbol
Parameter
Test conditions
Min Typ Max Unit
AVCC1
AVCC2
DVCC
I_CC3.3V
I_CC5V
T_A
T_J
Θ_JA
Θ_JB
Θ_JC
Ψ_JB
Ψ_JT
Analog Supply voltage
-
3.15 3.3
Analog Supply voltage
-
4.75 5
Digital Supply voltage
-
3.15 3.3
Standard mode
- 130
External VCO standard mode - 110
Current Consumption at 3.3 V
Diversity slave mode
Diversity master mode
- 105
- 155
External VCO diversity master
mode
-
145
Current Consumption
High current mode at 5 V
Low current mode at 3.3 V
- 160
- 90
Operating ambient temperature
-
-40
Maximum junction temperature
-
-
Junction to ambient package thermal
resistance⁽¹⁾
Multi-layer JEDEC board
- 33
Junction to board package thermal
resistance⁽¹⁾
Multi-layer JEDEC board
- 19
Junction to case package thermal
resistance⁽¹⁾
Multi-layer JEDEC board
-
3
Thermal characterization parameter
junction to board⁽¹⁾
Multi-layer JEDEC board
- 18
Thermal characterization parameter
junction to top case⁽¹⁾
Multi-layer JEDEC board
- 0.3
3.45 V
5.25 V
3.45 V
150 mA
130 mA
120 mA
180 mA
165 mA
185 mA
105 mA
85 °C
125 °C
- °C/W
- °C/W
- °C/W
- °C/W
- °C/W
1. Refer to JEDEC standard JESD 51-12 for a detailed description of the thermal resistances and thermal parameters.
Data here presented are referring to a Multi-layer board according to JEDEC standard.
T_J = T_A + Θ_JA * Pdiss (in order to estimate T_J if ambient temperature T_A and dissipated power Pdiss are known)
T_J = T_B + ΨJ_B * Pdiss (in order to estimate T_J if board temperature T_B and dissipated power Pdiss are known)
T_J = T_T + ΨJ_T * Pdiss (in order to estimate T_J if top case temperature T_T and dissipated power Pdiss are known)
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